[SI-LIST] 4 vs 6 Vertice Eye masks

Hello,

In the Infiniband and PCI Express electrical specifications
the Eye opening diagrams/templates are created with 4 vertex
quadrilaterals (diamonds). Furthermore, the UI math works out
as I would expect, that is:    1UI =3D Eye-opening-min + Jtr

Conversely, the XAUI (803.3ae) and RapidIO electrical specs
use 6 vertex hexagons. Refering to 802.3ae section 47 terminology,
I see how the X1 and 1-X1 vetices are placed, they in fact obey
the 1UI =3D Eye-opening-min + Jtr relationship I observed above.
I do not see how the X2 and 1-X2 vertices are derived, do you
know how these vertices are derived from the Tx or Rx UI specs?
I tried a transition time calculation but it did not work out
(but of course my calculations may be incorrect).

Thx,
Jim

-
Jim Antonellis      jim.antonellis@xxxxxxxxxxxxx
Sandburst Corp   www.sandburst.com
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Cell: 978.618.4745

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