[linux-cirrus] Re: [PATCH] Re: FastBus mode, core running on HCLK

On Fri, 2007-02-02 at 08:30 -0700, Jesse Off wrote:
> Here is the code (which I cut-and-paste from the TS-BOOTROM source)
> 
>         // Go to async mode
>         asm ("mrc p15, 0, r0, c1, c0, 0");
>         asm ("orr r0, r0, #0xc0000000");
>         asm ("mcr p15, 0, r0, c1, c0, 0");
> 
> You might double-check and make sure nobody is clobbering that 
> coprocessor reg by doing a write when it should be doing a 
> read-modify-write. 
> 
> //Jesse Off

Hi --

Well, I've read through head.S following the kernel startup code, and I
can't see anywhere that writes c1 without a read-modify-write.

If nF was clobbered, that would break all of the arm920T cores, right?
I believe this only happens on TS boards.  Looking into head-armv.S in
the TS (2.4.26-ts10) kernel, I see:

                .type   __ret, %function
__ret:          ldr     lr, __switch_data
#if defined(CONFIG_ARCH_EP9301) || defined(CONFIG_ARCH_EP9312) ||
defined(CONFIG_ARCH_EP9315)
                /*
                 * Put us in Async mode
                 */
                orr     r0, r0, #0xC0000000
 #endif
                mcr     p15, 0, r0, c1, c0, 0

This snippet is not in vanilla 2.4.26, and would clearly mask the
problem of nF not being set by the bootrom.  Maybe the bootrom code
emitted is not what you think?

Until some more skilled can find where nF is being clobbered, or add
some code to see if it is or isn't set by the bootrom, how about this
patch?  It's against 2.6.20-rc7, and it works for me.

Regards, ......... Charlie


diff -ubr arm.orig/mach-ep93xx/Kconfig arm/mach-ep93xx/Kconfig
--- arm.orig/mach-ep93xx/Kconfig        2007-01-30 22:42:57.000000000
-0500
+++ arm/mach-ep93xx/Kconfig     2007-02-03 14:41:40.000000000 -0500
@@ -7,6 +7,15 @@
        help
          Enable kernel support for MaverickCrunch.

+config CR1_NFBIT
+        bool "Turn on nF bit in ControlRegister 1"
+        help
+         Say 'Y' here to force the nF bit on.  Usually this is set
+         by the bootrom.  If it is not set, then the CPU core will
+         run from HCLK instead of FCLK, and performance will suffer.
+         If you see BogoMIPS of about 1/4 of your CPU clock, try
+         turning this on; your performance should double.
+
 comment "EP93xx Platforms"

 config MACH_ADSSPHERE
diff -ubr arm.orig/mm/proc-arm920.S arm/mm/proc-arm920.S
--- arm.orig/mm/proc-arm920.S   2007-01-30 22:42:57.000000000 -0500
+++ arm/mm/proc-arm920.S        2007-02-03 14:29:00.000000000 -0500
@@ -395,6 +395,9 @@
        mrc     p15, 0, r0, c1, c0              @ get control register
v4
        bic     r0, r0, r5
        orr     r0, r0, r6
+#ifdef CONFIG_CR1_NFBIT
+       orr     r0, r0, #0x40000000             @ set nF
+#endif
        mov     pc, lr
        .size   __arm920_setup, . - __arm920_setup

Other related posts: