[PCB_FORUM] Re: netlist load killing diff pair settings

Patrick,

Whenever you change your schematics, update your techfile everytime & import 
it after netlist in allegro.
This solves your problem.

Trilok 

  

-----Original Message-----
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx]On Behalf Of
austin@xxxxxxxxxxxx
Sent: Sunday, January 29, 2006 7:21 AM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Re: netlist load killing diff pair settings


Just a wild guess...check that the netnames are exactly the same...

Regards,

Austin

Original Message:
-----------------
From: westfeldt westfeldt_nbcd@xxxxxxxxx
Date: Sat, 28 Jan 2006 15:44:15 -0700
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] netlist load killing diff pair settings


When I load a netlist, the 4 diff pairs I set up last, several netlist loads
ago, get their diff pair designation and properties blown away.  I have to
redo them every time.  Initially, I did the logic auto designate, but these
four I had to add in a revision.

v15.2 performance.

Anybody know what this is?

Patrick Westfeldt, Jr.
North Boulder Circuit Design
westfeldt_nbcd@xxxxxxxxx
720-406-0887
c 720-272-5822


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