[PCB_FORUM] Re: how to forbid copper in 15.7

Workaround, not great but should work:
put a solid shape on this area durin design and remove it before generate outputs. 

Jean-Charles

Michael Wang a écrit :
Using package keepout is not the way I want for this case because I only need keep out the pin and the other copper element. In some case I do need allow some part of package placed in this area but its pins is not allowed. Thanks, 
Mike
2009/5/20 Sakthivel <sakthivel2405@xxxxxxxxx <mailto:sakthivel2405@xxxxxxxxx>> 

    Use package keepout


    On Wed, May 20, 2009 at 10:56 AM, Michael Wang
    <michaelnwwang@xxxxxxxxx <mailto:michaelnwwang@xxxxxxxxx>> wrote:

        Hey dear all,
Just an interesting question. I just want constrain a 
        area with no copper allowed. As we know, "route keepout" and
        "via keeout" can be assigned to that area. So no trace or via
        is allowed in that area. However, after that, you can see Pins
        is still allowed in the area. So the question is how to forbid
        pins also. Does anybody have good comments?
Regards, 
        Mike
-- REGARDS 

    S.Sakthivel

    I'm not the best
    but I'm not like the rest



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