[PCB_FORUM] env variable


I recently renumbered a board design that was heavily constrained in V15.5.1. After I read in any third party netlist I always go to Setup advisor and run device setup. I run DB doctor after that and then I open my CM spreadsheet and run an audit of my ECsets. Well on my renumbered board my constraints lit up red with errors and my audit showed numerous topology errors. All my pin pairs hads the new ref des but all my ec sets showed the old ref des.

I had to manually view every constraint in SigXplorer and update CM. This was a big waste of time for me. I contacted Cadence about this problem and was told to put this variable into my env file.
I thought I would share this news with my fellow designers. This variable must be present prior to renumbering your board. I advise everyone to please place this variable in their env file os suffer the consequenses.

set UPDATE_ECSET_REFDES

Regards,

Tony Stanislao
Senior Designer
FreedomCad Services, Inc.


-----------------------------------------------------------
To subscribe/unsubscribe: Send a message to icu-pcb-forum-request@xxxxxxxxxxxxx
with a subject of subscribe or unsubscribe

To view the archives of this list go to 
http://www.freelists.org/archives/icu-pcb-forum/

Problems or Questions:
Send an email to icu-pcb-forum-admins@xxxxxxxxxxxxx
-----------------------------------------------------------

Other related posts: