[PCB_FORUM] Re: diff pairs
- From: Mike DeVita <mdevi@xxxxxxxxx>
- To: icu-pcb-forum@xxxxxxxxxxxxx
- Date: Wed, 24 Aug 2005 11:19:35 -0700
Thanks Chris,
This fixed a long running problem we have, didn't realize you could apply
both constraints.
"Chris Brennan" <Chris.Brennan@xxxxxxxx>@freelists.org on 08/24/2005
10:25:41 AM
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Subject: [PCB_FORUM] Re: diff pairs
That's incorrect, you most definitely can. The proper method is to use
a combination of both CM and the physical rule sets. Use the physical
rule sets to difine per layer spacinging and line widths and leave those
fields blank in CM. Use all the other fields in CM as necessary (ie.
Uncoupled Length, phase tolerance, Min Line Spacing, (+) and (-)
Tolerance).
CJB
Chris Brennan, C.I.D.
PCB Designer
Fidus Systems Inc.
chris.brennan@xxxxxxxx
Tel (613) 828 0063 x322
Fax (613) 828-3113
-----Original Message-----
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Mike DeVita
Sent: Wednesday, August 24, 2005 1:13 PM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Re: diff pairs
You cannot use Constraint Manager to set up differential pairs rules for
differential pairs that have per layer routing rules, you can only use
the
Constraint System (old form) and forgo the CM, that was the point.
"Chris Brennan" <Chris.Brennan@xxxxxxxx>@freelists.org on 08/24/2005
10:03:46 AM
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Subject: [PCB_FORUM] Re: diff pairs
You have to define a Min Line Spacing in constraint manager to get rid
of those DRC's.
CJB
Chris Brennan, C.I.D.
PCB Designer
Fidus Systems Inc.
-----Original Message-----
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Mike DeVita
Sent: Wednesday, August 24, 2005 11:38 AM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Re: diff pairs
We are having the same issues here for differential pair routing on
multiple layers which is not supported by the Constraint Manager. If you
use the Constraint System (old form) to set your spacing and physical
rules
for your differential pairs and include a line to line space for pairs
to
other nets, you will get DRCs within the pair. For instance try this:
1.) Set min/max line width and primary/neck gap under the physical
rules
for your diff pair rules.
2.) Set spacing rules for the diff pair line to line in the spacing
section
to something larger than your primary gap space set in the physical
section. (this keeps adjacent nets from being coupled to the diff pair
nets).
3.) Associate the rules to your diff pairs, set up your assignment
table.
4.) Route the pair out.
5.) You will see that the diff pair follows the primary gap and line
width
but you will also see a DRC flag saying that line to line is violated
even
though the tool routed to the designed primary gap.
"Naren" <naren@xxxxxxxxxx>@freelists.org on 08/24/2005 07:55:24 AM
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Subject: [PCB_FORUM] Re: diff pairs
Hi
you need to set layer wise spacing in net_spacing_class
Procedure is like
1) setup-> constraints-> (Set spacing rules)->set values->
2) add new constraingt set (say diff) apply your spacing criteria here
3) set assignment table according to your requirement.
4) attach that class to net (all diff pairs).
5) update DRC.
Hope it will work....
westfeldt said:
> Working my way through new performance option features. Looks like
> Electrical Constraint set does not have trace and space by layer, so I
> have
> just set them up in logic so far. How do I go set constraints for
trace,
> gap, and space to other sets by layer?
>
> Patrick Westfeldt, Jr.
> North Boulder Circuit Design
> westfeldt_nbcd@xxxxxxxxx
> 720-406-0887
> c 720-272-5822
>
>
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