[PCB_FORUM] Re: diff pairs

Hi

you need to set layer wise spacing in net_spacing_class
Procedure is like
1) setup-> constraints-> (Set spacing rules)->set values->
2) add new constraingt set (say diff) apply your spacing criteria here
3) set assignment table according to your requirement.
4) attach that class to net (all diff pairs).
5) update DRC.


Hope it will work....




westfeldt said:
> Working my way through new performance option features.  Looks like
> Electrical Constraint set does not have trace and space by layer, so I
> have
> just set them up in logic so far.  How do I go set constraints for trace,
> gap, and space to other sets by layer?
>
> Patrick Westfeldt, Jr.
> North Boulder Circuit Design
> westfeldt_nbcd@xxxxxxxxx
> 720-406-0887
> c 720-272-5822
>
>

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