[PCB_FORUM] Re: diff pair in 16.0
- From: "Austin Franklin" <allegrolist@xxxxxxxxxxxx>
- To: <icu-pcb-forum@xxxxxxxxxxxxx>
- Date: Mon, 20 Aug 2007 11:56:30 -0400
Hi Sam,
I setup the line widths by assigning a physical rule set to these nets, and
setting up that rule set in "setup/constraints.../Physical rule set/Set
values...", not in CM. Note, you can set the gap/width up for different
layers which you may have to do depending on your stack-up.
I also setup a spacing rule set for my diff pairs in the same place, except
under "Spacing rule set". Hope this helps.
Regards,
Austin
-----Original Message-----
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx]On Behalf Of sjchar3@xxxxxxxxxxxx
Sent: Monday, August 20, 2007 11:28 AM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] diff pair in 16.0
Group: Where do i set up the diff pairs? I'm in CM under electrical ->
Differential.
Phase tolerance = 10 mil
Min Line spacing =5 mil
primary gap = 7 mil.
But while routing I get 3 mil .
Is the primary gap the spacing between the pairs or is it min line
spacing?
I need 7 mil trace with 5 mil spacing.
Thanks
Sam
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- References:
- [PCB_FORUM] diff pair in 16.0
- From: sjchar3
Other related posts:
- » [PCB_FORUM] diff pair in 16.0
- » [PCB_FORUM] Re: diff pair in 16.0
- [PCB_FORUM] diff pair in 16.0
- From: sjchar3