[PCB_FORUM] Z-axis voltage spacing
- From: Mark Salberg <msalberg@xxxxxxxxxxxx>
- To: Cadence User Group <icu-pcb-forum@xxxxxxxxxxxxx>
- Date: Tue, 19 Sep 2006 10:26:48 -0400
Hello group,
Can anybody steer me to an IPC and/or UL spec that references a Z-AXIS
"volts per mil" distance through FR4 dielectric.
We have a 1200 V board and am "hearing" very different numbers.
50v / mil, 100v / mil and 750v / mil.
Also, is the IPC Voltage spacing table for internal conductors the save
a Z-axis?
50v per mil thru an IPC "technet" as a "rule of thumb.
100v / mil from E.E's and other designers.
750v / mil from our UL safety guy. This was for a 1200V Cat II which has
6000v trannsients. Calculating to 750v / mil INCLUDING
transients...6000V divided by 750 = 8 mil.
Who is right?
Where can I reference or verify this?
Thank you in advance,
Mark
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_____________________________________________________________________________ Scanned by IBM Email Security Management Services powered by MessageLabs. For more information please visit http://www.ers.ibm.com _____________________________________________________________________________
- [PCB_FORUM] IDF import to PROE
- From: Eileen Ong