[PCB_FORUM] Re: Unssuported pads and B/B vias
- From: "westfeldt" <westfeldt_nbcd@xxxxxxxxx>
- To: icu-pcb-forum@xxxxxxxxxxxxx
- Date: Tue, 28 Jun 2005 15:51:22 -0600
Yes, it's not comforting to consider vias through 12 layers with pads only
on top and bottom. My main reason for employing this tactic is to get some
reasonable amount of copper in the plane pours of BGA fanouts. Seems that
the antipad can be safely smaller when there is no pad, not by much but
somewhat. If I leave the pad in there and use a reasonable constraint
setting, the planes get ripped up pretty bad, even for 1mm BGA.
Patrick Westfeldt, Jr.
720-406-0887
-----Original Message-----
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Schwartz, Jerome
Sent: Tuesday, June 28, 2005 11:16 AM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Re: Unssuported pads and B/B vias
Rob,
Although Allegro can remove these pads, ultimately it is a
fabrication issue.
Let the vendor make the choice as to which pads to remove on which layer.
Leaving some pads on layers helps with plating. Also, pads that only appear
on layers far from each other can cause a "riveting" effect of the plated
hole. Giving little support to the barrel.
Regards,
Jerry Schwartz, CID+
IPC Advanced Certified Designer
"May The Schwartz Be With You."
Designer 3
Harris Corporation GCSD Voice (321)-727-5474
P.O. Box 37, MS 1/3232 Pager (321)-690-9797
Melbourne, FL 32902-0037
mailto:Jerome.Schwartz@xxxxxxxxxx
http://www.harris.com
"Everything can be taken from a man but one thing:
the last of human freedoms-to choose one's own attitude in any given set of
circumstances, to choose one's own way." Viktor Frankl - Auschwitz survivor.
-----Original Message-----
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Rob Blomström
Sent: Tuesday, June 28, 2005 12:43 PM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Unssuported pads and B/B vias
All,
I've been reading the earlier discussions about routing and outputting
unsupported pads on designs. I have been doing this as a matter of course
for years, but today I had a new twist added to the problem based on a
question from
a new pcb fab vendor that we are having boards quoted by.
Typically, I ask the artwork generation parameters to "Suppress unconnected
pads"
on all my inner layers and have never had any problems from the vendors.
However, it seems that during all this time, the tool has been omitting the
entry/exit
padstacks from blind and buried vias (if the entry/exit falls on on inner
layer)
as well as my intended targets of non-routed-to vias.
My current vendor has simply been dealing with the issue and not stopping
to flag the problem.
Does anyone have any thoughts on how to keep extry/exit via pads but
continue to surpress the
truely unconnected pads?
Thanks,
Rob Blomstrom, Senior PCB Designer
rob@xxxxxxxxxxxxx
http://blomstrom.biz/rob
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