[PCB_FORUM] Re: Solder mask layer definition
- From: "Eileen Ong" <eileen.ong@xxxxxxxxxxxxxx>
- To: <icu-pcb-forum@xxxxxxxxxxxxx>
- Date: Thu, 14 Dec 2006 09:37:18 +0800
Hi,
Right now they are defined as same via type, is there a way to global
replace the test via to another via type?
Thanks.
Best regards,
Eileen
_____
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Gene Carman
Sent: Thursday, December 14, 2006 9:30 AM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Re: Solder mask layer definition
You need to have different vias for that... create the vias with the solder
mask you need and then place the vias you need in the proper place in the
design.
-----Original Message-----
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx]On Behalf Of Eileen Ong
Sent: Wednesday, December 13, 2006 5:09 PM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Solder mask layer definition
Hi,
Help will be very much appreciated; trying to figure before I release the
Gerber.
I'm trying to set up the bottom solder mask in the artwork setting.
I have a standard via that are defined as test via on some locations.
How do I set up the artwork solder mask layer such that for test via, the
solder mask is open and non test via the solder mask is close.
Thanks in advance.
Best regards,
Eileen
- References:
- [PCB_FORUM] Re: Solder mask layer definition
- From: Gene Carman
Other related posts:
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- » [PCB_FORUM] Re: Solder mask layer definition
- » [PCB_FORUM] Re: Solder mask layer definition
- » [PCB_FORUM] Re: Solder mask layer definition
- » [PCB_FORUM] Re: Solder mask layer definition
- [PCB_FORUM] Re: Solder mask layer definition
- From: Gene Carman