[PCB_FORUM] Re: Shape won't fill

It's not only Cadence, I've had similar problems with Mentor Pads, and Mentor Board station.
Lou



Patrick Jabbaz wrote:

Kevin,
I've had the same problem you are reporting, over and over again, it seems that 
Cadence has not been able to get Copper shapes right, regardless of static, or 
dynamic shapes.
I have come to the conclusion, that when you have a fairly large board, with many 
obstacles "vias and pads" the large copper shapes get corrupted.
The solution I use in such situations, is to break down the shape, into smaller 
shapes, this at least works, it does take more time, and effort, but it works.
Hopefully if enough customers report such problems, Cadence, would actually do 
something about it, and spend the time to fix this pending issue.

Regards,
Inkra Networks
Patrick Jabbaz
Sr Layout Design Eng.
(408) 621-6533

-----Original Message----- From: Kevin McCowan [mailto:kmccowan@xxxxxxxxxxxxxx] Sent: Mon 12/20/2004 8:16 AM To: icu-pcb-forum@xxxxxxxxxxxxx Cc: Subject: [PCB_FORUM] Re: Shape won't fill



I actually just got the latest update sr and it did not
fix the issue. I was hoping that this would be the
solution to the problem, but no. I would love to send
this to cadence to see what they think, but without
maintenance... What are you gonna do?

Kevin

Gino Papelera wrote:
> Kevin,
>
> I had a board which had out of date shapes that would not fill in an early
> release of 15.1 Sent it out to Cadence and they said to use the latest 15.1
> ISR. Sure enough that fix the problem. Probably not the solution you want to
> hear since your maintenance just expired. Version 15.1 s051 was the one that
> fix it for me.
>
> Gino
>
> -----Original Message-----
> From: Kevin McCowan [mailto:kmccowan@xxxxxxxxxxxxxx]
> Sent: Monday, December 20, 2004 6:55 AM
> To: icu-pcb-forum@xxxxxxxxxxxxx
> Subject: [PCB_FORUM] Shape won't fill
>
>
> Ok, my turn.
> I have a plane layer filled with a plane.
> I have cut out (or overlayed) 3 smaller plane cutouts.
> 2 of them are no problem. One of them refuses to fill.
> When I move it off the board it fills fine, back on, empty.
> I redrew it and deleted the original, same thing.
> I z-copied to another layer and it filled. Z-copy it back
> and empty. I haven't tried changing the net, yet.
> Cadence just send out an advisory that said if this happens move it zero and
> put it back down and it will fill. NOT! I made it static and it filled. Now
> I need to void all of the vias and pins. If I select all of the vias and
> pins it says "error: no shape left after voiding". If I select a small bunch
> of vias (20-25) and pins it works. But it takes literally 40 minutes to
> complete each time. I have a dual 3.06G xeon with 1G mem. It is the last net
> in the design and I have been fighting this *&@$%! thing for 3 days. Any
> ideas?
>
> Oh, by the way, our maintenance expired, money issues.
> We'll pick it up again next year (I hope). I have not
> been able to contact cadence on this due to that.
>
> Much thanks in advance,
> Kevin McCowan
> Sr PCB Designer
> TSI Telsys




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