[PCB_FORUM] Re: Shape won't fill
- From: Les Wong <maveric0@xxxxxxxxxxx>
- To: icu-pcb-forum@xxxxxxxxxxxxx
- Date: Mon, 20 Dec 2004 07:58:37 -0800 (PST)
Kevin:
Make sure that you don't have multiple/duplicate shapes
on top of each other, and that they are assigned the correct nets.
Les
Kevin McCowan <kmccowan@xxxxxxxxxxxxxx> wrote:
Yes. I have changed this shape to static but when I
try to void the internals it takes 40 minutes to
add all of the voids. Painful.
Kevin
Les Wong wrote:
> Kevin:
> I think one of our desigers had this problem with dynamic shapes
> in Allegro 15.1
> We deleted all the dymanic shapes and recreated them as
> static and everything was fine
> Les Wong
>
> */Kevin McCowan /* wrote:
>
> Ok, my turn.
> I have a plane layer filled with a plane.
> I have cut out (or overlayed) 3 smaller plane cutouts.
> 2 of them are no problem. One of them refuses to fill.
> When I move it off the board it fills fine, back on, empty.
> I redrew it and deleted the original, same thing.
> I z-copied to another layer and it filled. Z-copy it back
> and empty. I haven't tried changing the net, yet.
> Cadence just send out an advisory that said if this happens
> move it zero and put it back down and it will fill. NOT!
> I made it static and it filled. Now I need to void all of
> the vias and pins. If I select all of the vias and pins
> it says "error: no shape left after voiding". If I select
> a small bunch of vias (20-25) and pins it works. But it
> takes literally 40 minutes to complete each time.
> I have a dual 3.06G xeon with 1G mem.
> It is the last net in the design and I have been fighting
> this *&@$%! thing for 3 days.
> Any ideas?
>
> Oh, by the way, our maintenance expired, money issues.
> We'll pick it up again next year (I hope). I have not
> been able to contact cadence on this due to that.
>
> Much thanks in advance,
> Kevin McCowan
> Sr PCB Designer
> TSI Telsys
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- References:
- [PCB_FORUM] Re: Shape won't fill
- From: Kevin McCowan
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- [PCB_FORUM] Re: Shape won't fill
- From: Kevin McCowan