[PCB_FORUM] Re: Schematic drafting practices
- From: "Ritter, Alan" <Alan.Ritter@xxxxxxxxxx>
- To: "icu-pcb-forum@xxxxxxxxxxxxx" <icu-pcb-forum@xxxxxxxxxxxxx>
- Date: Fri, 27 Mar 2009 10:40:05 -0400
Thanks, Jim! (Nice to know someone appreciates us dinosaurs...)
Some things that are very useful on the first page of the schematic:
1. A table of contents specifying what functional sections are on which
page(s) of the schematic.
2. A table of power/ground pins for all ICs on the schematic.
3. A table of test points with signal names and page numbers where they show
up.
/s/jar (Alan Ritter, alan.ritter@xxxxxxxxxx)
http://www.mtritter.org
-----Original Message-----
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of jwages
Sent: Friday, March 27, 2009 9:31 AM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Re: Schematic drafting practices
My mentor in schematic creation was by the aforementioned Dinosaur...Thanx
Alan. Through the many years of working with many different levels of
engineers there are a few things that can really help the layout designer,
most of which, Alan already outlined.
I can not emphasize enough about how helpful it is to include as much
layout-pertinent information on the schematic as possible. If you can't
group relative components on the same page, then add a note indicating
relative importance. If you can't place all the decoupling capacitors on the
same page and next to their component, add a note stating their IC
association. Series resistors should be placed close to the driving IC or
have note stating they are to be located within X inches of that IC.
Indicate placement preference of termination devices.
There are also a lot of obvious rules that seem to get overlooked. Please be
sure that component pin numbers to not overlap reference designators and
remember to hide unnecessary pin numbers, like for resistors and other two
pinned components.
Use universal signal indicators like gnd and power instead of trying to wire
them together.
Provide a block diagram page of the major schematic circuitry blocks on one
page.
Provide notes of major current requirements.
Discuss and incorporate signal properties into the schematic.
Check for and eliminate single node nets.
Jim S. Wages
SR PCB Layout Designer
H) 919-237-3915 C) 919-484-2963
-----Original Message-----
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Ritter, Alan
Sent: Friday, March 27, 2009 10:07 AM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Re: Schematic drafting practices
I guess I'll have to defend the honor of at least SOME of us engineers...
Those of us who grew up actually DRAWING schematics (with pencil and paper,
not a mouse!) learned about signal flow and organization, especially in a
day when a schematic had more than one or two ICs on it. (Think 74-series
MSI TTL and the early PAL/GAL programmable logic devices.)
(Ok, disclaimer here: I finished my BSEE in 1974 and MSEE in 1978, so yes,
I started out with paper and pencil for schematics and tape on mylar for
layouts. Call me a dinosaur...guilty as charged, Your Honor.)
Your best bet is probably a DIY approach. Show them some well-organized
schematics with proper left-to-right signal flow and most engineers are
logical enough to pick it up fairly quickly.
Others are untrainable...I'll admit that...
We have started several times to define schematic-drawing conventions but it
seems that about the time we get a decent draft, the technology changes
enough that it messes up our strategy. (That includes simple but critical
things like signal naming conventions, which have been changed several times
on us as we moved from Cadentix to Valid to Cadence to Orcad plus all of the
various EPLD software we've used over the years.)
Your best bet is to get them to think of a hierarchical organization of
their designs and grouping functionally-related components together. Then
start off with the simple stuff...inputs on the left, outputs on the right.
Some things (like good visual layout) are tough to teach...either they
understand intuitively or they don't and it'll never sink in. The other
stumbling block is an unwillingness to add just ONE MORE PAGE to the
schematic so you can un-crowd the pages and make them all more readable.
(Or, you can take that to the opposite extreme like the IBM System/7
schematics that I had to work on in grad school. One register or one small
block of logic per page with umpteen inputs and outputs to several other
pages. Those were HORRIBLE and they came from Big Blue!)
...should be an interesting discussion...
/s/jar (Alan Ritter, alan.ritter@xxxxxxxxxx)
http://www.mtritter.org
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