[PCB_FORUM] Re: Schematic drafting practices

Hi Bill,

> >>The real important question I've asked you is how do you verify
> pins on a
> >>schematic are hooked up correctly if the pins are not visible?
> Especially
> >>if you do are not using the native tool to do the verification.  Please
> >>answer that.
>
> Electronic verification during symbol build
> Part of library development.
> Compare pinlist of FPGA/Proc/Etc to symbol data.

It seems you are saying there is no need for human checking of power and
ground pins...ever.  That your automated methodology has %100 no possible
chance of any error.

How is the pinlist generated?  How do you "verify" what signal it's
connected to (which is separate from extracting/generating the data)?  Let's
say, for VCCO on an FPGA?

No automated process, without some human intervention, can assign all
groupings and voltages of all power/ground pins.  The information just isn't
there in a datasheet pinout table (nor is there any universal format) in
many cases.

What if there was suspect that the power/ground pins weren't correct?  How
would you check them?

> Excel is an
> amazing tool.

Yes.  And you can also generate a symbol or a table the same way you
generate a pinlist, so this method has nothing to do with visible or
invisible power/ground pins.

But, you seem to also be tool centric...IOW, you have a particular tool
(Allegro Design Entry aka Concept HDL it seems like?) that you are touting
features from that do not exist universally in other tools.  The only thing
that is universal in other tools is putting the pins visibly on the
schematics.

> Who would visibly check that with that many pins?

I'd think any electrical engineer would know the answers to that, and has
done it many many times.

If you find a problem, and suspect that it may be a power/ground issue, you
check it.  Or, if you just made the symbol and want to have it checked,
well, obviously you check it.  The easiest way to check it is with the
pinout list from the datasheet (which is gospel) against the schematic
component representation information (symbol, table whatever).  You'd have
to do the same with your pinlist against the datasheet.

You still haven't given a concrete reason for not supplying the power/ground
information on the schematic.  The ONLY downside is it takes up real-estate.
No matter if it is %100 correct or not in your method, any other method can
be %100 correct as well.  You're also dictating what others down the line
can and can not do by not giving them this information on the schematics.

Verification is only one potential use of this information.  Another use is
to find a ground to hook a scope ground up to that is as close as possible
to pin you want to probe.  Another is to hook up a wire to.  Sure, you can
look at other sources for this information, but why not have one complete
and accurate source for this information that anyone can use without having
to have other software to use?  Not everyone has the schematic tools and the
layout tools available to them.

Regards,

Austin

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