[PCB_FORUM] Re: Schematic drafting practices

Just a few comments from my side of the world. I have to use my own
schematics in the lab as I am the EE who is forced to use his own work
(schematics, layouts, silkscreen!!, documentation).  I *never* use the
power/ground table nor do I use the individual pinned out symbols -- in the
case where the symbol is huge (FPGA, processor).  I use PDF!  I hotlink
everything in the lab to PDF now and have monitors around where online data
(local, www) is at your fingertips.  When using OrCAD, the P/G for large
symbols is placed as its own part with individual pins.  In Concept, the
hidden P/G through size is used with and without the table. Tables are no
longer generated as we find they are a waste of time. For small analog
parts, the VCC/GND pins are individually instantiated.

Over the last 25 yrs I have seen schematics change from draftsman-drawn
blueprints to modern CAD schematics.  I know what *hands-on* guys are using
in the lab.  I've managed labs. I've debugged.  I've layed out.  I've built
symbols.  Power and Ground needs to be your company philosophy -- but don't
force something on someone until YOU'VE used your own documentation RULES
and learned the pros and cons of the rules.

BD

-----Original Message-----
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Watts III, Nolan
Sent: Monday, March 30, 2009 7:17 AM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Re: Schematic drafting practices

Austin,

Very much disagree.  I do not believe it is efficient use of body size
to place visible standard voltage power and ground signals on the body.
Cadence has provided this convention in their libraries from day one and
so have we.  If you have a device with multiple/many power and ground
symbols then you propose adding another symbol to accommodate them?  You
do have to remember to place that symbol though.  Where do you place it?
Right next to the symbol it refers or do you put it on another page?
For digital-type parts it's not really necessary.  You don't have to
place a second symbol.  We actually use the SIZE property to place
multiple pins on one visible pin on the part.  Since Cadence won't
backannotate sized bodies, we have created a custom script to
backannotate those pin numbers on the body using comma-separated lists
and ranges.  Those that are too long automatically go to a table on the
page.  

We also create a hidden power and ground list table that's placed in the
schematic to document all the hidden power and ground pins. That's
sufficient documentation IMHO.  Why do you have to increase your symbol
size when you can refer to a table to get the information?  If you are
in the lab, wouldn't having a table make it easier?  However, for analog
parts, voltage signals are shown as they may have unique connectivity
requirements. That's our exception to the rule.

Schematics can be very subjective, almost like art.  Some may argue that
they are only good for getting a correct netlist out and don't care what
they look like.  At the other end of the spectrum you have those that
want highest quality where everything is such that it looks like
Michelangelo di Lodovico Buonarroti Simoni drew it.  The value added
proposition comes into play as to what effort is expended for drawing
your schematics.  

There's not a perfect way to draw a schematic.  Too many ways to do it,
too many opinions on how to do it.  Best advise is to establish a set of
guidelines and make your "artists" follow it.  Consistency is important.
 

Nolan Watts 

-----Original Message-----
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Austin Franklin
Sent: Friday, March 27, 2009 11:32 AM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Re: Schematic drafting practices

Hi Alan,

> Regarding the power/ground pin table, if you use implicit
> power/ground pins and POWER_GROUP properties in Cadence/Concept,
> the power/ground pins may NOT be shown on the component schematic
> entities, so a table is most helpful.

Agreed, but that, IMO, is bad practice to not show all the power/ground
pins
of a component on the component's symbol.

Regards,

Austin

-----------------------------------------------------------
To subscribe/unsubscribe: 
Send a message to icu-pcb-forum-request@xxxxxxxxxxxxx
with a subject of subscribe or unsubscribe

To view the archives of this list go to
http://www.freelists.org/archives/icu-pcb-forum/

Problems or Questions:
Send an email to icu-pcb-forum-admins@xxxxxxxxxxxxx
-----------------------------------------------------------
-----------------------------------------------------------
To subscribe/unsubscribe: 
Send a message to icu-pcb-forum-request@xxxxxxxxxxxxx
with a subject of subscribe or unsubscribe

To view the archives of this list go to
http://www.freelists.org/archives/icu-pcb-forum/

Problems or Questions:
Send an email to icu-pcb-forum-admins@xxxxxxxxxxxxx
-----------------------------------------------------------

-----------------------------------------------------------
To subscribe/unsubscribe: 
Send a message to icu-pcb-forum-request@xxxxxxxxxxxxx
with a subject of subscribe or unsubscribe

To view the archives of this list go to 
http://www.freelists.org/archives/icu-pcb-forum/

Problems or Questions:
Send an email to icu-pcb-forum-admins@xxxxxxxxxxxxx
-----------------------------------------------------------

Other related posts: