[PCB_FORUM] Re: Schematic drafting practices

Hi Nolan,

> Very much disagree.  I do not believe it is efficient use of body size
> to place visible standard voltage power and ground signals on the body.

I'm not sure we disagree.  It appears you're focusing on the mechanism
(using a symbol to show these pins), as opposed to point being made, being
the overall functionality (having these pins and their connections visible
on the schematics).

> Cadence has provided this convention in their libraries from day one and
> so have we.  If you have a device with multiple/many power and ground
> symbols then you propose adding another symbol to accommodate them?

Yes.  Not only do I propose it, I have been doing it for 20 years, with no
downsides.

> You
> do have to remember to place that symbol though.

In DxD, the design won't compile without it, so the tool will let you know
you forgot if you forget.  You could forget to put your table on the
schematic equally as well.

> Where do you place it?
> Right next to the symbol it refers or do you put it on another page?

That depends.  On a current schematic I'm working on, the DDR2 power/ground
symbols are placed on the sheet that contains the entire DDR circuit
including termination resistors and decoupling caps and I also include
visible PCBCLASS and DIFFPAIR attributes.  On the video processor, which is
a 676 pin BGA, the power, ground and no-connect blocks are on a separate
sheet, with that devices decoupling caps.  You can place it anywhere you can
place a table.  A table will be about the same size as a symbol.

> For digital-type parts it's not really necessary.

Well, schematics aren't really necessary either.  You could do the entire
layout by manually bring in components and connecting pins.  It's not a
matter of necessary or not, it's a matter of providing quality and complete
documentation that reduces the errors, and provides easy and complete
information for those that have to use the schematics.  Not only to simply
generate a netlist.

> You don't have to
> place a second symbol.  We actually use the SIZE property to place
> multiple pins on one visible pin on the part.  Since Cadence won't
> backannotate sized bodies, we have created a custom script to
> backannotate those pin numbers on the body using comma-separated lists
> and ranges.  Those that are too long automatically go to a table on the
> page.

For a smaller number of pins, say, 4, that certainly can be done.  I still
prefer them to be individual pins, but that's my preference.

> We also create a hidden power and ground list table that's placed in the
> schematic to document all the hidden power and ground pins. That's
> sufficient documentation IMHO.

How is that useful if it's hidden?  Now, that I strongly disagree with, and
IMO, is what I was referring to as "bad practice".

> Why do you have to increase your symbol
> size when you can refer to a table to get the information?  If you are
> in the lab, wouldn't having a table make it easier?

I'm not sure it increases the symbol size any more than having a table does
with respect to taking up room on the schematic, nor do I believe a table is
"easier".  The "table" is nearly identical (if it's visible, and if it is
used to determine the actual pinout and what that pin is connected to when
generating the netlist, not just an annotation) to creating another
symbol...that's simply preference.  Why not just make tables for all your
parts/pins if it provides the same facility if this method is easier?

> Schematics can be very subjective, almost like art.  Some may argue that
> they are only good for getting a correct netlist out and don't care what
> they look like.  At the other end of the spectrum you have those that
> want highest quality where everything is such that it looks like
> Michelangelo di Lodovico Buonarroti Simoni drew it.

Absolutely true.

> There's not a perfect way to draw a schematic.  Too many ways to do it,
> too many opinions on how to do it.  Best advise is to establish a set of
> guidelines and make your "artists" follow it.  Consistency is important.

Sure.  But that wasn't the issue.  Not all schematic tools provide this
table mechanism.  Whether listing power and ground pins in a table or by
whatever mechanism, as long as that mechanism provides the pin number and
what that pin is connected to, AND it is visible, and that information is
used to generate the netlist, that meets the requirement I have.

The important point is to have all the pinout and connectivity information
visible, accurate and complete.  Not doing so lends it self to errors that
could easily be avoided, and can make others (and your own) more difficult
than they need be.

Regards,

Austin

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