[PCB_FORUM] Re: Schematic drafting practices

Hi Alan,

> Regarding the power/ground pin table, if you use implicit
> power/ground pins and POWER_GROUP properties in Cadence/Concept,
> the power/ground pins may NOT be shown on the component schematic
> entities, so a table is most helpful.

Agreed, but that, IMO, is bad practice to not show all the power/ground pins
of a component on the component's symbol.

Regards,

Austin

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