[PCB_FORUM] Re: Removing unused pad rings on inner layers DURING design...

  • From: "Gerry Meier" <gerry.meier@xxxxxxxxxxxxxx>
  • To: <icu-pcb-forum@xxxxxxxxxxxxx>
  • Date: Thu, 31 Mar 2005 11:29:43 -0800

 Oleg,

Not sure what your motivation here is. By properly defining your vias,
line widths and spacings you should be able to route two lines through
even 1mm BGAs (unless you boards have high aspect ratios). Attempting to
use the drill hole as you clearance can be dangerous for high speed
nets. You could actually get the line close enough to the hole that it
is not referencing the plane. With dielectric thickness going down I
find my line widths are actually getting too narrow.

In really tight areas where you have trouble getting one line through (<
1mm BGA etc.) I use a constraint area to define a smaller line to via
spacing but also increase the line to line spacing in the constraint
area to
Not Allow a route past pins with connections on that layer. This will
allow a route past unconnected pins and when the vias are removed you
have your additional spacing.

Regards,
Gerry



 Gerry Meier 
Sr. PCB Designer 
Freedom CAD Services, Inc. 
Voice: (603) 864-1300 x1350 
Alt. Voice: (386) 753-0048 
Email: gerry.meier@xxxxxxxxxxxxxx 
visit our website at<http://www.freedomcad.com 


-----Original Message-----
From: Austin Franklin [mailto:austin@xxxxxxxxxxxx] 
Sent: Thursday, March 31, 2005 1:03 PM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Re: Removing unused pad rings on inner layers
DURING design...

Hi Oleg,

> I think during design you do need pads on all layers in order to have 
> proper DRC.

There is no design requirement to have pads on all layers, only when
they are connected to a trace on a particular layer (outer layers
aside).  With the pad ring removed, the clearance is not trace to pad,
but trace to drill instead.  This gives a lot more routing room between
vias.  As I mentioned, I do this very thing routinely, but with custom
pad stacks.  And, as you note, this is routinely done during fabrication
as well, so why can't the tool do it during design (or can it, and
that's my question)?

Regards,

Austin


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