[PCB_FORUM] Re: Relative prop delay

Hey Gerry,

 

Thanks for the reply.

 

Of course AMD has Expert licenses (the Brinks truck delivers to Cadence
regularly!).

 

I'm going to try the schematic package driven method first.

 

Regards,

Gary

 

  

Gary E. MacIndoe
PCB Design Engineer
Fort Collins, Colorado

amd.com

gary.macindoe@xxxxxxx

________________________________

From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Gerry Meier
Sent: Wednesday, April 18, 2007 8:58 AM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Re: Relative prop delay

 

Gary,

 

Pin delays can only be used in "Allegro Expert" and can be imported with
a .CSV file.

 

But you must work in expert , if you adjust these nets in "performance"
the pin delay will not be calculated. 

 

Regards,

Gerry

 

________________________________

From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Macindoe, Gary
Sent: Wednesday, April 18, 2007 9:44 AM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Relative prop delay

 

Hey guys,

 

It has reached the point where I have to consider the package length
when matching some nets.

I am using Relative Propagation Delay in CM, and was wondering if anyone
knows how to include the package lengths?

I thought maybe the Pin Delay columns, but they are grayed out.

 

Any ideas?

 

Regards,

Gary

 

 

Gary E. MacIndoe
PCB Design Engineer
Fort Collins, Colorado

amd.com

gary.macindoe@xxxxxxx

 


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