[PCB_FORUM] Re: Relative prop delay

  • From: "Peter Hughes" <phughes@xxxxxxxxx>
  • To: <icu-pcb-forum@xxxxxxxxxxxxx>
  • Date: Wed, 18 Apr 2007 15:50:39 +0100

Hi Gary,
 
In order to include the package lengths in a component you need to add
them to the packages section of the schematic symbol. These values will
then appear in the Pin Delay columns.
 
Rgrds
 
Peter Hughes,
PCB Designer,
Concurrent Technologies,
4 Gilberd Close,
Newcomen Way,
Colchester,
Essex,
CO4 4WN.
Tel: +44 1206 752626
Fax: +44 1206 751116
-----Original Message-----
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Macindoe, Gary
Sent: 18 April 2007 15:44
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Relative prop delay
 
Hey guys,
 
It has reached the point where I have to consider the package length
when matching some nets.
I am using Relative Propagation Delay in CM, and was wondering if anyone
knows how to include the package lengths?
I thought maybe the Pin Delay columns, but they are grayed out.
 
Any ideas?
 
Regards,
Gary
 
 
Gary E. MacIndoe
PCB Design Engineer
Fort Collins, Colorado
amd.com
gary.macindoe@xxxxxxx
 

GIF image

Other related posts: