[PCB_FORUM] Relative prop delay
- From: "Macindoe, Gary" <Gary.Macindoe@xxxxxxx>
- To: icu-pcb-forum@xxxxxxxxxxxxx
- Date: Wed, 18 Apr 2007 09:44:00 -0500
Hey guys,
It has reached the point where I have to consider the package length
when matching some nets.
I am using Relative Propagation Delay in CM, and was wondering if anyone
knows how to include the package lengths?
I thought maybe the Pin Delay columns, but they are grayed out.
Any ideas?
Regards,
Gary
Gary E. MacIndoe
PCB Design Engineer
Fort Collins, Colorado
amd.com
gary.macindoe@xxxxxxx
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