[PCB_FORUM] RE : Keepout areas for testpoint symbols but not testpoint vias.
- From: "Jean-Charles TEYSSIER" <jcteyssier@xxxxxxxxxxxxxxx>
- To: <icu-pcb-forum@xxxxxxxxxxxxx>
- Date: Wed, 21 Dec 2005 09:40:38 +0100
Just an idea:
Create your test point symbol and add a place boundary between 1000 MM and 1001
MM.
Add a place keepout so that components will generate a DRC violation if you
place it in this area.
Not an "elegant" solution but it should work.
-------- Message d'origine--------
De: icu-pcb-forum-bounce@xxxxxxxxxxxxx de la part de Daniel So
Date: mar. 20/12/2005 22:48
À: icu-pcb-forum@xxxxxxxxxxxxx
Objet : [PCB_FORUM] Keepout areas for testpoint symbols but not testpoint vias.
Has anybody had any success in the following situation?
I have functional test points which are symbol pad test points and I
have ICT test points which are test point vias.
I have a keepout area which should allow test point via (ICT) but not
functional test points (symbols).
There are other symbols, caps and resistors, in the area. How do I set
up a keepout area that will show violations for the functional test
points only but not the ICT test points or other symbols?
I have tried using the package_height_min on a package keepout with
little success.
Daniel So
1065 La Avenida
Mtn View, Ca 94043
(650) 693-2054
email: danielso@xxxxxxxxxxxxx
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- » [PCB_FORUM] RE : Keepout areas for testpoint symbols but not testpoint vias.