[PCB_FORUM] Re: Propagation Rules driven from Schematic to Allegro
- From: "Michael Catrambone" <Michael.Catrambone@xxxxxxxxxx>
- To: <icu-pcb-forum@xxxxxxxxxxxxx>
- Date: Sat, 26 Apr 2008 03:32:09 +0800
Ignore the brackets around the value. It should be DIFFP_PHASE_TOL with
a value of 25 mils.
In a 3rd Party netlist it would look like this:
Diff Pair:
DIFFERENTIAL_PAIR DIFFPAIR_A ; NetA_P NetA_N
DIFFERENTIAL_PAIR DIFFPAIR_B ; NetB_P NetB_N
Phase Tolerance:
DIFFP_PHASE_TOL 25MILS ; NetA_P NetA_N NetB_P NetB_N
Hope this helps,
Michael Catrambone
UTStarcom, Inc.
________________________________
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Michael
Catrambone
Sent: Friday, April 25, 2008 2:15 PM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Re: Propagation Rules driven from Schematic to
Allegro
Importance: High
You want to add a DIFFP_PHASE_TOL <25 mil> to your diff pairs to
control the length between the pairs and not a Rel Prop Delay. All of
the diff pair rules are easily controlled in Constraint manager and I
would recommend only passing the DIFFERENTIAL_PAIR property to define
your pairs and set everything else in Constraint Manager.
Hope this helps,
Michael Catrambone
UTStarcom, Inc.
________________________________
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Dale Rasmusen
Sent: Friday, April 25, 2008 1:55 PM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Propagation Rules driven from Schematic to Allegro
Hi all, I was wondering how to do the following...
I have diff pairs that need to have REL_PROP_DELAY GRP:G:L:S::25
properties between P and N signals.. but I also want to place 20 of
these pairs in a group that must adhere to a PROP_DELAY of
L:S:1000:2000.
Thus I have P and N constraints as well as a group prop delay
constraint.
I'm not sure how to structure these rules for Allegro. Your help is
appreciated.
Thanks,
Dale Rasmusen
CAD Manager
TEKNOVUS
(707) 665-0400 ext 133
(707) 665-0491 fax
- References:
- [PCB_FORUM] Verilog to allegro netlist?
- From: arimitsu seiji
- [PCB_FORUM] Propagation Rules driven from Schematic to Allegro
- From: Dale Rasmusen
- [PCB_FORUM] Re: Propagation Rules driven from Schematic to Allegro
- From: Michael Catrambone
Other related posts:
- » [PCB_FORUM] Propagation Rules driven from Schematic to Allegro
- » [PCB_FORUM] Re: Propagation Rules driven from Schematic to Allegro
- » [PCB_FORUM] Re: Propagation Rules driven from Schematic to Allegro
- » [PCB_FORUM] Re: Propagation Rules driven from Schematic to Allegro
- » [PCB_FORUM] Re: Propagation Rules driven from Schematic to Allegro
- » [PCB_FORUM] Re: Propagation Rules driven from Schematic to Allegro
- » [PCB_FORUM] Re: Propagation Rules driven from Schematic to Allegro
- » [PCB_FORUM] Re: Propagation Rules driven from Schematic to Allegro
- [PCB_FORUM] Verilog to allegro netlist?
- From: arimitsu seiji
- [PCB_FORUM] Propagation Rules driven from Schematic to Allegro
- From: Dale Rasmusen
- [PCB_FORUM] Re: Propagation Rules driven from Schematic to Allegro
- From: Michael Catrambone