[PCB_FORUM] Re: OrCAD Layout to Allegro PCB...

I would probably export a Telesis netlist from Orcad capture and then
export the required device files from the translated allegro board file.
You will still have to do some schematic work to get it all to sync but
I think it will be less.


Gerry Meier, Sr. PCB Designer
Freedom CAD Services. Inc
Voice: (256) 776-7470 or (603) 864-1350
Email:gerry.meier@xxxxxxxxxxxxxx
visit us at http://www.freedomcad.com
 
 
-----Original Message-----
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Danny
Sent: Monday, May 25, 2009 1:37 PM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] OrCAD Layout to Allegro PCB...

Hi,

I had been using OrCAD Layout for many years. About two years ago, I
purchased 
Allegro PCB Design L with all options except partitioning. I have now
created 
several boards using Allegro and I am now pretty fluent using it.

I recently received an older PCB done in OrCAD Layout and it's
associated 
Capture schematic from a new client. They are wanting to move it over to

Allegro. I was able to convert the .MAX file within Allegro.

As expected, when when creating the Allegro netlist from this older
Capture 
schematic (that was originally for OrCAD Layout), I recieved many errors
from 
the netlister:

1) the many 'stock' PCB library footprint names that were shipped with
OrCAD 
Layout contain several characters that Allegro cannot use, i.e., '.',
'/', and 
spaces,

2) complains about duplicate schematic pin names on ICs (visible
non-power 
pins), i.e., VCC, GND,

3) and on, and on...

After saving all of the PCB footprints in Allegro from the converted
.MAX file, 
I see that the illegal 'characters' from item #1 above have simply been
removed 
in the new .DRA filenames.

Long question made short, is there a faster method to cross-over a OrCAD

Layout/schematic-to-Allegro PCB/schematic combination (all PCB footprint

fieldnames within an older schematic)? I believe I know how to fix all
of this, 
but since this is a large design, it will take many extra hours just to
get it 
to the point where a new netlist can be generated in Capture (Allegro
Design 
Entry) and carried over to the newly converted Allegro PCB.

I know that I can use Capture to prepare a BOM with footprint info, take
the 
footprint info into Excel, change illegal footprint names to match what
is in 
the new .DRA filenames, and create an 'Update file' to change the
footprint 
names in the part fields in Capture. Then I know I can go into Capture
and edit 
all parts with duplicated pin names from item #2 above. And on, and
on...

Are there any other potential problems that I have not yet uncovered?
The client 
is wanting a time estimate before beginning actual work...

Are there, for example, Perl scripts that can be used to help with some
of this?


Thanks,

Danny

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