[PCB_FORUM] Re: Negative Shapes: via voiding

I agree with you Mike but for me I am usually working several designs and have 
access to several machines and it is easier for me to use the positive dynamic 
feature for this type of design functionality. There have been to many 
occasions in the old days where I have forgotten to go an cleanup the voids 
left, and sometimes it has actually cause problems in the designs. So when 
allegro is spinning its wheels figuring out what to do I just go to the next 
design on another machine, and do another task. I can afford to wait for 
allegro to do job right I can't afford to respin board because of an error of 
which there is no DRC to catch, of course if I had specctraquest and signoise 
it may be the better way to go for me too.

-----Original Message-----
From: Michael.Catrambone@xxxxxxxxxx
[mailto:Michael.Catrambone@xxxxxxxxxx]
Sent: Thursday, October 28, 2004 3:52 PM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Re: Negative Shapes: via voiding
Importance: High



I have to disagree.. You can define voids in negative
shapes using auto or manual void around pins and vias
which is larger than what is antipad inside the padstack.
I do it all the time for isolation purposes, mainly in main
PSU Sections of the board.

It is a real pain because every time you move a via or pin
the negative shape is out of date but on larger designs
turning all the negative planes to positive / dynamic shapes
would be even move of a pain. Its a personal preference
but from my experience things slow down the more
dynamic shapes you have in larger designs.

My two cents,
Michael Catrambone
UTStarcom, Inc.




george.h.patrick
10/28/2004 02:10 PM


Please respond to icu-pcb-forum@xxxxxxxxxxxxx

Sent by:


To:    icu-pcb-forum@xxxxxxxxxxxxx
cc:
Subject:    [PCB_FORUM] Re: Negative Shapes: via voiding



With a negative plane you have to change the thermal and antipad sizes.
The
artwork is generated by flashes, not with a drawn plane.

Or go with a positive plane :{
--
George Patrick
Tektronix, Inc.
Central Engineering, PCB Design Group
P.O. Box 500, M/S 39-512
Beaverton, OR 97077-0001
Phone: 503-627-5272         Fax: 503-627-5587
http://www.tektronix.com    http://www.pcb-designer.com

It's my opinion, not Tektronix'



-----Original Message-----
From: richard moffat [mailto:richard.moffat@xxxxxxxxxxxxxxxxxxx]
Sent: Thursday, October 28, 2004 11:45
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Negative Shapes: via voiding


Hi

Hoping this hasn't been asked before:

I have set a NET_SPACING_TYPE on a negative shape (plane) to meet
isolation requirements.  The via-to-shape and pin-to-shape spacing rules
are not being followed.

According to Cadence, the via antipad has priority.  Can I force the
shape to follow the NET_SPACING_TYPE rule?

(I don't want a positive shape; I think it would kill my design since
it has 22000 vias.)

Cheers,
Richard

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