[PCB_FORUM] NO_RAT property appearing from schematic

From: "Daniel So" <danielso@xxxxxxxxxxxxx>
To: <icu-pcb-forum@xxxxxxxxxxxxx>
Date: Thu, 28 Apr 2005 08:04:28 -0700

I am reading in a netlist from Concept which is suppose to have no
constraints or properties. However, I am getting a NO_RAT property on
the GND net. Doing a search on the ascii files of the schematic pages
shows no instances of this property. The property does not appear in any
of the dat files created from Concept. Any ideas where this property is
coming from?

 

Thanks for any ideas

 

Daniel So

1065 La Avenida

Mtn View, Ca 94043

(650) 693-2054

email: danielso@xxxxxxxxxxxxx

Follow-Ups:

[PCB_FORUM] Re: NO_RAT property appearing from schematic
From: William Gerner

[PCB_FORUM] NO_RAT property appearing from schematic

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