[PCB_FORUM] Max Parallelism not forcing spacing requirements. Only gives a DRC.

  • From: "Mark Salberg" <msalberg@xxxxxxxxxxxx>
  • To: <icu-pcb-forum@xxxxxxxxxxxxx>
  • Date: Fri, 16 Mar 2012 12:45:13 -0400

Max Parallelism not forcing spacing requirements. Only gives a DRC.

 

I have max Parallelism rules set as below.

When I slide these traces together, it will report a DRC, but I would like
it NOT to allow me to slide too close together.



How can I set Allegro to NOT allow these traces too close together. During
slide, I have Allowed DRC left UNCHECKED.



 

Thanks in advance,

Mark

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