[PCB_FORUM] Mask to Mask (Stacked Blind vias) False Error.

Hello all,
In Allegro V.15.1, I have a top thru layer 8 blind via and layer 13 thru 20 blind via stacked over one another.
I also have Soldermask to soldermask spacing set to 4mil in Constraint / Design Constraint set to 4 mil spacing.
No bottom mask set in top blind via and visa-versa.

PROBLEM: I am getting a DRC (M/M) from top blind mask to bottom blind mask.

Any sugestions?

Thanks,
Mark



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