[PCB_FORUM] Re: Length matching for DDR






Al,

I did quite a few DDR2 (component, not module) FPGA boards this past year.  the 
resources I used were the links in yesterdays email, as well as:

Doug Brooks - Controlling impedance when nets branch out (on Mentors site)
Altera Cyclone II DDR2 notes
Ideas derived from the termination island that they recommend for modules
Xnets, virtual pins in the Specctra manual, and David Price at Born To Route, 
for T-route, length match of the address T segments to data routes
a Specctra crosstalk rule out of the users guide, to spread routes based on 
their coupled length

All boards had no issues.

Look for the results during the Beijing Olympics, the designs were for a 
ultra-HD (16x HD) video camera I worked on for Micron.

Randy


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