[PCB_FORUM] Re: FW: [pcbforum] topology error with constraint manager 14.2
- From: "Julian Ungureanu (jungurea)" <jungurea@xxxxxxxxx>
- To: <icu-pcb-forum@xxxxxxxxxxxxx>
- Date: Wed, 1 Feb 2006 06:59:30 -0800
Bill,
Was the "use routed interconnect" checked or unchecked when you
extracted the topology?
I don't think the tool likes that.
If you don't use that topology for simulation, single ended drivers are
just fine for using.
Create one side and apply to both nets.
Julian
-----Original Message-----
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Bill O'Leary
Sent: Wednesday, February 01, 2006 6:52 AM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Re: FW: [pcbforum] topology error with constraint
manager 14.2
Julian,
I deleted everything except the TLINES before I tried importing.
(my single ended topologies are working just fine) Bill
-----Original Message-----
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx]On Behalf Of Julian Ungureanu
(jungurea)
Sent: Wednesday, February 01, 2006 8:46 AM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Re: FW: [pcbforum] topology error with constraint
manager 14.2
Under the Options menu on SigXp, uncheck the buttons that say "extract
routed interconnect" before extracting the topology.
On your SigXp canvas you should see TLines not Strip (or microstrip)
lines.
Then you can import into CM.
Julian
-----Original Message-----
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Bill O'Leary
Sent: Wednesday, February 01, 2006 6:39 AM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] FW: [pcbforum] topology error with constraint
manager 14.2
-----Original Message-----
From: pcbforum-bounce@xxxxxxxxxxxxx
[mailto:pcbforum-bounce@xxxxxxxxxxxxx]On Behalf Of Bill O'Leary
Sent: Wednesday, February 01, 2006 8:33 AM
To: pcbForum
Subject: [pcbforum] topology error with constraint manager 14.2
HI,
I extracted and then modified a topology using diffpairs with
sigExplorer expert v14-2-57DM
when I try to import the topology as an ECSET I get:
topology template CK_DIFF is invalid because:
Topology contains an illegal part. Interconnect must be represented
with TLINES only. TRACES and VIAs are not allowed.
I only have TLINES, resistors, capacitors and diff driver/receivers in
the topology.
Does anyone know what this is about?
Does 14.2 support Differential topologies?
thanks,
Bill O'Leary
CadEnhance LLC.
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