[PCB_FORUM] Re: Creepage verse Clearance
- From: "steve kingdon" <steve.kingdon@xxxxxxxxxxxxxxxxxxx>
- To: <icu-pcb-forum@xxxxxxxxxxxxx>
- Date: Tue, 15 Mar 2005 10:03:57 +1300
Hi there,
I used to work for a company that designed switchmode power supplies,
and we had the same issue.
A part solution would be to use constraint areas. I was using Veribest
at the time, so this feature was not available to us. This would get rid
of the DRC issue, (eg a clearance violation from one Cu feature to
another Cu feature across a slot), but would not solve the creepage
measurement issue, eg what is the distance from one Cu feature to
another around the end of a slot, would imagine this would be a manual
thing still.
So potentially what I might do is to set your general constraint to the
creepage distance, and in areas that you have slots, create a constraint
area with the clearance rule applied.
How do you manage it at the moment?
Cheers
Steve
>>> jgoshorn@xxxxxxx 15/03/05 09:30:32 >>>
Our standard DRC clearance are checked perfectly with a line of
sight
type calculation within
the Allegro tool. But while working on high voltage type boards a curve
ball is thrown at us, not
only do we have to maintain certain clearances but we also have
maintain a
higher number sometimes
referred to as Creepage. This can be twice the size as clearance and
because we are working
in a limited size board we often accomplish this by adding slots into
the
board to satisfy the UL and CE
type regulations. Has anyone come up with a clever way to have Allegro
meet
both of these requirements
and not have to compromise the database rules.
Jim Goshorn
MCL, Inc
501 S Woodcreek Rd
Bolingbrook, IL 60440
630-771-7205
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