[PCB_FORUM] Re: Constraint manager xnets

Hi Mark,

> +/-25mils is for a DDR Double Data Rate match requirement for data to
> strobe.

I hadn't noticed that was +-25 MILS.  +-25ps, for me, would be the right
number (%2 of 800MHz). Which, given a 166ps/inch trace velocity, gives a
length of 150 mils for 400MHz DDR data group (25ps/166ps = xmils/1000mils).

I'd suggest that you might want to go back and check that spec out...it
looks to me like whoever spec'd it meant ps, not mils.  I've done quite a
few DDR designs, and +-25mils is *really* aggressive and probably a rather
large overspec for a length match.

Now, for the differential clock for the address/control group, phase
matching between the two legs of the differential pair to +-25 mils is what
I've used.

Regards,

Austin
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