[PCB_FORUM] Re: Constraint manager xnets
- From: Mark Salberg <msalberg@xxxxxxxxxxxx>
- To: icu-pcb-forum@xxxxxxxxxxxxx
- Date: Fri, 27 Jan 2006 12:33:54 -0500
Yes, I did create a matched length group. But I had the pin pairs set to
longest pin pair. Now with that removed, I am hoping it will route.
+/-25mils is for a DDR Rouble Data Rate match requirement for data to
strobe.
Still working on it.
Thanks,
Mark
austin@xxxxxxxxxxxx wrote:
Hi Mark,
Did you setup matched length groups?
BTW, why do you need to match to +-25 mils? That's a requirement for an
8GHz length match in my book!
Regards,
Austin
Original Message:
-----------------
From: Mark Salberg msalberg@xxxxxxxxxxxx
Date: Fri, 27 Jan 2006 10:56:24 -0500
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Constraint manager xnets
Good Morning,
I am looking for some help routing xnets in Allegro or Specctra.
I have xnets defined from adding component models.
I set up a class of xnets for prop delay to match a target xnet to
+/-25mils.
I created pin pairs of each xnet from driver, through terminator
resistors to receiver.
Xnet path=U1.1- R1.1-R1.8-U6.1
Created pin pair U1.1 : U6.1
How do I get Specctra to route the matched lengths.
Thanks for any input,
Mark
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- Follow-Ups:
- [PCB_FORUM] Re: Constraint manager xnets
- From: Austin Franklin
- [PCB_FORUM] Re: Constraint manager xnets
- From: Austin Franklin
- References:
- [PCB_FORUM] Re: Constraint manager xnets
- From: austin@xxxxxxxxxxxx
Other related posts:
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- » [PCB_FORUM] Re: Constraint manager xnets
- » [PCB_FORUM] Re: Constraint manager xnets
- » [PCB_FORUM] Re: Constraint manager xnets
- » [PCB_FORUM] Re: Constraint manager xnets
- » [PCB_FORUM] Re: Constraint manager xnets
- » [PCB_FORUM] Re: Constraint manager xnets
- » [PCB_FORUM] Re: Constraint manager xnets
- » [PCB_FORUM] Re: Constraint manager xnets
Hi Mark,
Did you setup matched length groups?
BTW, why do you need to match to +-25 mils? That's a requirement for an 8GHz length match in my book!
Regards,
Austin
Original Message: ----------------- From: Mark Salberg msalberg@xxxxxxxxxxxx Date: Fri, 27 Jan 2006 10:56:24 -0500 To: icu-pcb-forum@xxxxxxxxxxxxx Subject: [PCB_FORUM] Constraint manager xnets
Good Morning, I am looking for some help routing xnets in Allegro or Specctra.
I have xnets defined from adding component models.
I set up a class of xnets for prop delay to match a target xnet to +/-25mils.
I created pin pairs of each xnet from driver, through terminator resistors to receiver.
Xnet path=U1.1- R1.1-R1.8-U6.1 Created pin pair U1.1 : U6.1
How do I get Specctra to route the matched lengths.
Thanks for any input, Mark
____________________________________________________________________________
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For more information please visit http://www.ers.ibm.com
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- [PCB_FORUM] Re: Constraint manager xnets
- From: Austin Franklin
- [PCB_FORUM] Re: Constraint manager xnets
- From: Austin Franklin
- [PCB_FORUM] Re: Constraint manager xnets
- From: austin@xxxxxxxxxxxx