[PCB_FORUM] Re: Concept signame question

  • From: "Davies, Charles \(cdavies\)" <cdavies@xxxxxxxxxx>
  • To: <icu-pcb-forum@xxxxxxxxxxxxx>
  • Date: Thu, 7 Sep 2006 16:36:02 -0400

Have you thought about using Checkplus.  There are a couple of rules
that you could run that might identify the condition.
 
Graphical Rules: graphic_connectivity_checks: [unnamed_net_offpage_body
or unnamed_net_flag_body]
 
  or 
 
Logical Rules: net_name_checks: single_node_net
 
Just a thought.

Regards, 
Charlie 
321.727.6235 

 

________________________________

From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Mark Salberg
Sent: Thursday, September 07, 2006 2:22 PM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Re: Concept signame question


Hi Shirley,
Yes, but all it does is point "temporarily" and is very difficult to see
if it is to a flag pin, a flag body or a short wire segment.
Then you have to zoom in to see and it goes away. Grantid, you can zoom
in and repeat this on every area on every page, but if you miss one...no
rat on board.

With all the wiring checks, why not have this? I know...I just couldn't
resist.
Thanks for your reply,

Mark
 

First of all:
Why would it EVER let you add a signal name to a flag if then it would
not recognize it as a connection??????????????????????
A new E.E. did not know better and littered the schematic

Bolman, Shirley H wrote:


        Have you tried using the show attachment? If a signal name is
attached
        to a pin there should
        be a red line to the pin. Signal names attached to wires show
where the
        name is attached on the wire.
        
        Shirley in Oregon 
        
        -----Original Message-----
        From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
        [mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Mark
Salberg
        Sent: Thursday, September 07, 2006 6:45 AM
        To: Cadence User Group
        Subject: [PCB_FORUM] Concept signame question
        
        Hello,
        Is there a way to tell if signames are attached to a wire
instead of a 
        flag? Besides attributing each wire which is very time
consuming.
        We found that a signame can be accidentally assigned to a flag
pin 
        instead of a wire segment.
        Therefore, the connection is not made in the board.
        
        How can we verify this was not done in our schematics.
        
        Thanks,
        Mark
        
        
        
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