[PCB_FORUM] Re: Changing netnames in Allegro not back-annotated to ConceptHDL schematics...
- From: "Chris Monk" <monk@xxxxxxxxxxx>
- To: <icu-pcb-forum@xxxxxxxxxxxxx>
- Date: Tue, 26 Apr 2005 15:50:53 -0400
Try the following. With the concept schematic open, from the projmgr
select DESIGN SYNC > DESIGN DIFFERENCES. You will get two windows, one
reporting Net Differences and one reporting Pin-net Connections
differences. These are simply a list of net name in concept vs. net
name in Allegro. Select SYNC > UPDATE DESIGN ENTRY HDL SCHEMATIC.
Select the OK in the Preview ECO on Schematic menu. The Design
Association menu will appear allowing you to Replace Pin-nets on a per
pin basis or the entire list can be selected and updated in a single
EXECUTE.
The one downside to this is that since nets are updated on a per pin
basis you lose the existing pin to pin wiring and end up with wire stubs
at the pins with the updated net name attached.
Regards,
Chris.
-----Original Message-----
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Austin Franklin
Sent: Tuesday, April 26, 2005 2:25 PM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Re: Changing netnames in Allegro not back-annotated
to ConceptHDL schematics...
Hi Kevin,
> Sounds like a good idea to me.
> To not be able to do that, I mean.
Well, I disagree, and obviously believe that you should be able to
change things in the design file and back annotate them. It's not my
preferred design methodology, but there are instances when it makes
perfect sense to be able to do this, instead of forcing a square peg
into a round hole.
> Why would you want to do that from Allegro, anyway?
Not that it should matter, as I believe this is a basic function back
annotation function (or why have back annotation)...but we have a design
that originated in Viewdraw, per the customer's requirements...then the
PCB was done in Allegro. Subsequently, they changed their requirements
and need ConceptHDL schematics. We drew them, and they match perfectly,
except for the default names assigned to signals that aren't
intentionally named. If we could back annotate the .brd file names to
the ConceptHDL schematics, then they would match perfectly.
> Doesn't the schematic drive the design in your group?
Yes, as much as can be, and personally, I would prefer it be done that
way.
But, sometimes the tools don't allow it to be done easily. For example,
Allegro Performance has the constraints manager in it, which allows easy
specification of constraints...but the ConceptHDL that comes with any of
the 200 series tools does not have the constraints manager. You have to
add constraints to the schematic through a rather tedious process
(though the base level Viewdraw has a constraints manager...chalk one up
for Viewdraw over Concept). So constraints are easier to add in Allegro
with it's constraint manager, than directly on the schematic, and then
simply back annotate them to the schematic.
I was rather perturbed that our rather expensive (though not the most
expensive) tools (schematic and layout) weren't "compatible" as far as
capabilities, and we aren't going to spend another $40k to simply get a
constraints manager in the schematic tool.
Regards,
Austin
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