[PCB_FORUM] Re: Changing netnames in Allegro not back-annotated to ConceptHDL schematics...

George,

> Not if you change the name.  What do you expect it to back annotate TO?
> It's the only reference the system has.  I guess you want a hidden "Net
> Name" that will track the visible "net Name", eh?

It has the network as a reference.  For example, U2.3 to U4.6.  This is not
a real difficult problem as far as a tool being able to do this correctly
(other tools do it no problem), it's just that this particular tool does not
support it...yet.

> Sorry, ain't going to happen.

> Probably could write an Allegro skill routine to interface with a Concept
> skill routine to resolve these kinds of conflicts, but it isn't worth the
> hassle.  There has to be SOMETHING in control, either the schematic or the
> board.  You have bought a system that considers the schematic to be in
> control.
>
> Live with it, or go buy something else ;>

Cadence said they have it on their list of future updates to the product, so
perhaps in a release or two it will work.  Which means, either can be "in
control".

Austin


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