[PCB_FORUM] Antwort: Re: design reuse question [Virus checked GT]
- From: Bruno.Renner@xxxxxxxxxxxxxxxx
- To: icu-pcb-forum@xxxxxxxxxxxxx
- Date: Mon, 29 Aug 2005 07:54:22 +0200
Hi Rock,
if your subdesign D_6 is placed on the board the submodule is never listet
under module instances in menu manual place.
the same behavior have been seen if any component of the subdesign is
placed manual by refdes.
regards
Bruno
Rock Shi
<rshi@xxxxxxxxxxx
u> An
Gesendet von: icu-pcb-forum@xxxxxxxxxxxxx
icu-pcb-forum-bou Kopie
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Thema
[PCB_FORUM] Re: design reuse
25.08.2005 15:36 question [Virus checked GT]
Bitte antworten
an
icu-pcb-forum@fre
elists.org
Hi Bruno,
When I do the manual placement, I see that under "Component by refdes",
D_6 components are listed there, marked with "placed". But under "Module
instances", I don't see D_6 but all other modules are there.
I don't understand what you have advised, can you explain it again? Also,
I am not that familiar with occurence mode, please help me futher. Thank
you very much.
Best regards,
Rock
On Thu, 25 Aug 2005, Bruno.Renner@xxxxxxxxxxxxxxxx wrote:
> Hi Rock,
> if there is any component from module D_6 placed on board you never see
> this module.
> If so delete all D_6 Components from board.
> What does you Concept show in occurence mode?
>
> regards
> Bruno
>
>
>
>
> Rock Shi
> <rshi@xxxxxxxxxxx
> u> An
> Gesendet von: icu-pcb-forum@xxxxxxxxxxxxx
> icu-pcb-forum-bou Kopie
> nce@xxxxxxxxxxxxx
> Thema
> [PCB_FORUM] design reuse question
> 24.08.2005 23:44 [Virus checked GT]
>
>
> Bitte antworten
> an
> icu-pcb-forum@fre
> elists.org
>
>
>
>
>
>
> Hi,
>
> I have met a problem in placing modules in my board design. In my
> schematic, I have six blocks, and I have assigned "SUBDESIGN_SUFFIX"
> properties as below:
>
> block name subdesign_suffix
>
> A 1
> B 2
> B 3
> C 4
> D 5
> D 6
>
> I believe I followed design reuse procedures very carefully. However,
> when I opened the exported board and tried to do the placement, I only
see
> modules
> A_1
> B_2
> B_3
> C_4
> D_5
>
> D_6 is always missing.
>
> I am running SPB 15.2 in UNIX. Any help and clue would be highly
> appreciated. Thanks very much in advance.
>
>
> Best regards,
>
> Rock
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Der Inhalt dieser E-Mail ist für den Absender rechtlich nicht verbindlich.
Informieren Sie uns bitte, wenn Sie diese E-Mail fälschlicherweise erhalten
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Nachricht. Jede Form der weiteren Benutzung ist untersagt.
The content of this e-mail is not legally binding upon the sender.
If this e-mail was transmitted to you by error, then please inform us
accordingly (Fax: +49-7551-89-6001). In such case you are requested to
erase the message. Any use of such e-mail message is strictly prohibited.
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- References:
- [PCB_FORUM] Re: design reuse question [Virus checked GT]
- From: Rock Shi
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- [PCB_FORUM] Re: design reuse question [Virus checked GT]
- From: Rock Shi