[PCB_FORUM] Re: Allegro 15.1: Shorting nets

Recently I've been playing with the NET_SHORT property in v14.2.

Here's what I've determined so far:

It can only be applied to a VIA or a PIN. It can't be applied to a SHAPE.

If you're using it to short a pin or via to a plane, it doesn't actually create 
a connection
between the pin and the shape, it merely suppesses the DRC.

When I used it with a negative shape, other DRC's on the net did not display 
properly.

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Joe Piper
Layout Design Engineer III
PCB Layout

CONEXANT SYSTEMS, INC.
9868 Scranton Road, Suite 1000
San Diego, CA 92121-1762

Tel   858.713.3571
Fax  858.713.4003
joe.piper@xxxxxxxxxxxx


                                                                                
                             
                      "Mike Finczak"                                            
                             
                      Sent by:                 To:       
<icu-pcb-forum@xxxxxxxxxxxxx>                       
                                               cc:                              
                             
                                               Subject:  [PCB_FORUM] Re: 
Allegro 15.1: Shorting nets         
                      08/26/2004 11:56                                          
                             
                      AM                                                        
                             
                      Please respond to                                         
                             
                      icu-pcb-forum                                             
                             
                                                                                
                             
                                                                                
                             




Jim,
             You can use the property "NET_SHORT" on device pins tie two
             signals together.  It works best on through hole pins, as two
             clines with different signals on the same layer will still
             produce a line to line DRC. The board shops have not complained
             about this method (yet).


Regards,
       Mike Finczak
       CopperCAD Design
       www.CopperCAD.com
       905-488-8958

-----Original Message-----
From: J Wages [mailto:jwages@xxxxxxxxx]
Sent: August 26, 2004 3:25 PM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Allegro 15.1: Shorting nets


Hey folks. Hopefully a simple question. Does Allegro 15.1 now have the
ability to short two nets together without creating a DRC error? I want
to short a digital ground plane with another isolated plane, but they
both have separate net names. I know I can do it by adding a feature
that will short the nets together using a non-etch layer during artwork
extraction, but that will cause an error at the fab end. Isn't there a
property I can add to a shape or via or pin?
Thanx in advance

Jim S. Wages / SR. PCB Layout Designer:
(919) 484-2963

-----Original Message-----
From: Schwartz, Jerome [mailto:jschwa01@xxxxxxxxxx]
Sent: Thursday, August 26, 2004 10:37 AM
To: 'icu-pcb-forum@xxxxxxxxxxxxx'
Subject: [PCB_FORUM] Re: strange characters in gerbers

Jan,

I tried: http://www.freedict.com/onldict/lat.html
Hillbilly does not translate.

 Regards,
      Jerry Schwartz, CID+
      IPC Certified Designer
     "May The Schwartz Be With You."

Designer 3
Harris Corporation GCSD              Voice (321)-727-5474
P.O. Box 37, MS 1/9843               Fax   (321)-727-6007
Melbourne, FL 32902-0037             Pager (321)-690-9797
mailto:Jerome.Schwartz@xxxxxxxxxx
http://www.harris.com




-----Original Message-----
From: Noble, Jan [mailto:jan.noble@xxxxxxxxx]
Sent: Thursday, August 26, 2004 11:26 AM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Re: strange characters in gerbers


Sam,
Your English is fine.  Welcome to the group.  HillBilly is my second
language.
:-))) Does anyone have a Latin translation for HillBilly?

Jan Noble
Intel Corporation
DuPont Board Development
253-371-6197

Cum catapultae proscriptae erunt tum soli proscripti catapultas habebunt

-----Original Message-----
From: sjcharles@xxxxxxx [mailto:sjcharles@xxxxxxx]
Sent: Thursday, August 26, 2004 8:22 AM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] strange characters in gerbers

Group,

I'm using the 15.2 cadence, and I'm generating gerbers. I'm seeing extra
characters in gerbers, but are not visible when I dislay the fab
drawing. I've
enable all layers and don't see these characters. Any ideas?

Please excuse my unsophisticated english.
Sam

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