[PCB_FORUM] Re: About Thermal Pad Land pattern

The same manufacturer (TI) published another application note
(scba017d), where they suggested that smaller multiple openings in the
stencil should be
used instead of one big opening for printing the solder paste on the
thermal pad region. You can also look for another application notes from
part vendors having in their offer parts with a thermal pad.

It is difficult to explicitly say that one way works better than the
other in all cases, please notice the difference between PowerPAD and
QFN packages, the later may have issues with other pins soldered if the
part is slightly elevated by the excessive amount of paste on the
thermal pad (QFN package is by a design flat on a bottom surface,
PowerPAD not necessarily).

Anyhow separating a power pad landing by a solder mask is not a good idea.

Robert

Luo.Yu-Ming@xxxxxxxxxxxxxxxx wrote:
> Hi, Tony,
> Thank you very very much, the attached files are very helpful, I will
> study them with our SMT guys to improve thermal pad reflow. thanks again.
> Have a nice day! :-)
> Best Regards,
> Luo.
>
> ------------------------------------------------------------------------
> *发件人:* Cosentino, Tony [mailto:Tony.Cosentino@xxxxxxxxxxx]
> *发送时间:* 2009年7月1日 20:35
> *收件人:* Luo, Yu-Ming (?_玉茗 IAC-N)
> *主题:* RE: [PCB_FORUM] About Thermal Pad Land pattern
>
> Luo,
> Please see the attached file and focus on the Thermal Pad stencil
> design techniques used.You will find it is not the copper thermal pad
> that is being partitioned - it isthe solder paste shape that is being
> partitioned. See examples inattached zip.
> Thanks
> Tony Cosentino
> Tekelec
> ------------------------------------------------------------------------
> *From:* icu-pcb-forum-bounce@xxxxxxxxxxxxx
> [mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] *On Behalf Of
> *Luo.Yu-Ming@xxxxxxxxxxxxxxxx
> *Sent:* Wednesday, July 01, 2009 4:49 AM
> *To:* icu-pcb-forum@xxxxxxxxxxxxx
> *Subject:* [PCB_FORUM] About Thermal Pad Land pattern
>
> Hi, All,
> Usually, we design thermal pad land pattern as same size as the chip
> thermal pad. Now our SMT engineer suggest separating the thermal pad
> to several little rectangle area with soldmask on board, to increase
> joint area. Are you doing like this? What is the benefit and risk?
> where can I get any article for reference?
> Thanks a lot. Any input would be great appreciate.
> Best Regards,
> Luo.

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