[PCB_FORUM] Re: 15.5.1
- From: "richard moffat" <richard.moffat@xxxxxxxxxxxxxxxxxxx>
- To: <icu-pcb-forum@xxxxxxxxxxxxx>
- Date: Tue, 13 Dec 2005 10:00:35 +1300
I agree. This would be really useful.
You can define parallelism in the CM, but I believe I'm correct in saying it
doesn't DRC in real-time. (Can someone verify this?)
I also take it you mean for edge-coupled and not broadside. (I thing broadside
would be a whole new can of worms.)
>>>ONE THAT I WOULD LIKE TO PROPOSE FOR PRIORITY CONSIDERATION - ROUTE AND
>>>SLIDE WORKING WITH PARALLELISM CONSTRAINTS
What's the list's opinions'?
>>> david@xxxxxxxxxxxxxx 13/12/2005 9:42 a.m. >>>
Don't think so, but have not checked sourcelink this week.
The list below seems to be complete
...
...
Best Regards
David Greig
______________________________
...
www.gigadyne.co.uk
______________________________
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of JACK KELLY
...
we don't have 15.5.1 loaded yet. is there a way to read the what's new for
release 15.5.1 prior to down loading it?
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of rjbzxr@xxxxxxxxxxxx
Sent: Monday, December 12, 2005 8:41 AM
To: icu-pcb-forum@xxxxxxxxxxxxx
...
...
NOTICE: This message contains privileged and confidential
information intended only for the use of the addressee
named above. If you are not the intended recipient of
this message you are hereby notified that you must not
disseminate, copy or take any action in reliance on it.
If you have received this message in error please
notify Allied Telesyn Research Ltd immediately.
Any views expressed in this message are those of the
individual sender, except where the sender has the
authority to issue and specifically states them to
be the views of Allied Telesyn Research.
Other related posts:
