[PCB_FORUM] Re: 0.5 mm BGA, whew!

Gary,

 

Some thoughts based on my HDI experience:

-         use via in pad with appropriate feature sizes

-         don't build vias into your library components, add them in the
design (critical for flexibility on dense designs)

-         build library components using the controlling measurements

-         if you have Specctra, you can perform initial fanout to pad origin
by appropriate control of via grid 

 

I've been away from Cadence tools for a bit, but I believe the appropriate
controls exist in the Expert tools for via-via by layer, via-via same net,
staggered / stacked vias, coincident vias, etc.

 

Does your design really require 1-2 / 2-3 / 3-4 sequential microvias?  Will
be extremely expensive to fabricate . may require ALIVH processing.

 

Hope this helps!

 

Dave Schaefer

 <mailto:dave.schaefer@xxxxxxxxxxxx> dave.schaefer@xxxxxxx

 

 

-----Original Message-----
From: Gary MacIndoe [mailto:gary.macindoe@xxxxxxx] 
Sent: Friday, October 29, 2004 11:06 AM
To: Allegro Forum
Subject: [PCB_FORUM] 0.5 mm BGA, whew!

 

All,

 

Well, it seems to be a slow day on the Forum, so I'll through out a
relatively involved set of questions!

 

We are looking into using a 0.5 mm BGA in a very dense design, so big time
HDI practices will come into play: micro vias (MVs), probably even stacked
micro vias (SMVs), in order to fan out on several layers.

 

-  would you use the micro vias in pad or not?  Why?  Build them into the
symbol?

 

-  how can you have the micro vias built into the symbol if you don't know
which balls will go down to which layer?

 

-  I will make the 0.5 mm BGA Allegro symbol with the drawing units set to
Millimeters, but would like to keep the design database set to Mils.  Is
this the way most of you have done it?

 

-  if the symbol is set to Millimeters and the design set to Mils, this
makes dropping the micro vias (in pad or not) after the BGA symbol is placed
in the design tricky.  Any other way to get around this?

 

-  So, setting up blind/buried micro vias should be the same as any
blind/buried via.  How about SMVs?  If you have a micro via set up for
layers 1-2, 2-3, 3-4, etc., how do you avoid the DRCs when you stack them
(same X,Y)?

 

My head is about spinning trying to comprehend all of this micro via/stacked
micro via stuff!

 

Any help from someone that has already used a 0.5 mm BGA on a very dense
design with stacked micro vias would be greatly appreciated!!

 

Thanks in advance,

Gary E. MacIndoe
PCB Design Engineer
Advanced Micro Devices, Inc.
Longmont, Colorado

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