[ibis-macro] New Macro Library release!

  • From: "Muranyi, Arpad" <arpad.muranyi@xxxxxxxxx>
  • To: "ibis-macro" <ibis-macro@xxxxxxxxxxxxx>
  • Date: Fri, 30 Jun 2006 09:53:46 -0700

Hello everyone,

After a long period of silence, I finally released another version
of the IBIS Macro Library.  It has been posted on our web site:

http://www.eda-stds.org/pub/ibis/macromodel_wip/element_lib/VHDL-AMS_element_library_SMASH_test.zip
http://www.eda-stds.org/pub/ibis/macromodel_wip/element_lib/Verilog-A_element_library_HSPICE_test.zip

This version has numerous improvements.  Here is a summary of the
changes in the VHDL-AMS version:


-- 2006/06/28  - Fixed "DIV" controlled sources to eliminate div/0 error 
--               due to execution order during first few simulation cycles.
--             - Fixed the input thresholds for buffers and event triggered
--               PWL sources to be more compatible with HSPICE's B-element
--               threshold levels.
--             - Fixed buffers and event controlled PWL sources to initialize
--               properly for all possible combinations of input values. 
--               Also, eliminated possible glitches due to execution order of
--               various simulation cycles.
--             - Added BREAK statements to "DIV" and event controlled PWL
--               sources.
--             - Fixed V-t tables in data files for Open_*** models.
--             - Added a warning to the IBIS_***_DIV elements.


Please note that the VHDL-AMS test cases are still compiled with the
older version of SMASH (5.6.2p2) in this release due to some problems
with the latest version of SMASH (5.7.0).


Here is a summary of the changes in the Verilog-A version:


// 2006/06/28  - Added port direction declarations.
//             - Fixed a typo in the "DIV" module's analog equations.
//             - Added "$discontinuity" statements to "DIV" and event
//               controlled PWL sources.
//             - Removed "\" character from some of the test bench files.
//             - Fixed event controlled PWL sources to initialize properly      
         
//               for all possible combinations of input values.
//             - Fixed the input thresholds for buffers and event triggered
//               PWL sources to be more compatible with HSPICE's B-element
//               threshold levels.
//             - Updated "state machine" of buffers and event controlled PWL
//               sources to follow the same algorithm as in the VHDL-AMS
//               version.
//             - Added a warning to the IBIS_***_DIV elements.


I hope that with these changes we will have a more robust library.
Also, as far as I am concerned, I think the library is pretty much
done (other than adding the description to each element).

Please let me know if there is a need to fix any bugs (I hope there
are none), or add any features, or bring it up for discussion in one
of our meetings.

Thanks and enjoy!

Arpad
=====================================================================
---------------------------------------------------------------------
IBIS Macro website  :  http://www.eda.org/pub/ibis/macromodel_wip/
IBIS Macro reflector:  //www.freelists.org/list/ibis-macro
To unsubscribe send an email:
  To: ibis-macro-request@xxxxxxxxxxxxx
  Subject: unsubscribe

Other related posts:

  • » [ibis-macro] New Macro Library release!