Hello everyone, This is to inform all of you that I released a new IBIS macro model library. They are now uploaded on our usual web site: http://www.eda.org/pub/ibis/macromodel_wip/element_lib The major changes in this version are as follows: 1) Implemented scaling coefficients for the IBIS buffer building blocks. These are compatible with the HSPICE B-element scaling coefficients, I just gave them different names, because I didn't like their names... kI_pc - scales the power clamp current kI_pu - scales the pullup current kI_pd - scales the pulldown current kI_gc - scales the ground clamp current kt_rise - scales the time axis of the rising waveforms kt_fall - scales the time axis of the falling waveforms In the waveform scaling coefficients a larger number will actually slow down the waveform, because time increases. For example 2x will stretch the waveform by a factor of two, and 0.5x will shrink the waveform by a factor of two. 2) While I was working on this I discovered a bug which affected how the common time axis for the waveforms were calculated. This would have caused problems if you tried using waveforms which did not have the same starting and/or ending times. This bug is fixed. 3) I also noticed that the default values of the C_comp splitting coefficients were different in the VHDL and Verilog versions of the library. I corrected that and they are the same now. 4) I also noticed that the splitted C_comp capacitors were missing in the VHDL-A(MS) library for the open-something buffers where there was no IV curve, while the Verilog version had them there too. I added these back in the VHDL version to be consistent. It may be arguable whether these should be there, but I think they should be there, because I have seen open-something buffers where the circuit was there, except it was disabled by the control logic. 5) I added scaling coefficients in the test circuits of the IBIS buffer building blocks to illustrate how they can be used. These are not necessary, but I put them in for illustration (and testing) purposes. 6) Some of the test circuits of the PWL sources were also changed just so I could display the waveforms of the simulation results on the same display panel, instead of having to use split panels. Purely cosmetic, but practical. I think this is all the changes. Please try them out and comment. Thanks, Arpad ====================================================================