[ibis-macro] Minutes from the 04 Nov 2008 ibis-atm meeting
- From: "Mirmak, Michael" <michael.mirmak@xxxxxxxxx>
- To: IBIS-ATM <ibis-macro@xxxxxxxxxxxxx>
- Date: Tue, 4 Nov 2008 19:25:24 -0700
Minutes from the 28 Oct 2008 ibis-atm meeting are attached.
MM
IBIS Macromodel Task Group
Meeting date: 04 November 2008
Members (asterisk for those attending):
Ambrish Varma, Cadence Design Systems
* Anders Ekholm, Ericsson
* Arpad Muranyi, Mentor Graphics Corp.
Barry Katz, SiSoft
* Bob Ross, Teraspeed Consulting Group
Brad Brim, Sigrity
Brad Griffin, Cadence Design Systems
* David Banas, Xilinx
Donald Telian, consultant
Doug White, Cisco Systems
Essaid Bensoudane, ST Microelectronics
Fangyi Rao, Agilent
Ganesh Narayanaswamy, ST Micro
Gang Kang, Sigrity
Hemant Shah, Cadence Design Systems
Ian Dodd, Agilent
Joe Abler, IBM
* John Angulo, Mentor Graphics
John Shields, Mentor Graphics
Ken Willis, Cadence Design Systems
Kumar
Lance Wang, Cadence Design Systems
Luis Boluna, Cisco Systems
* Michael Mirmak, Intel Corp.
Mike LaBonte, Cisco Systems
Mike Steinberger, SiSoft
Mustansir Fanaswalla, Xilinx
Patrick O'Halloran, Tiburon Design Automation
Paul Fernando, NCSU
* Pavani Jella, TI
* Radek Biernacki, Agilent (EESof)
Randy Wolff, Micron Technology
Ray Comeau, Cadence Design Systems
Richard Mellitz, Intel
Richard Ward, Texas Instruments
Sam Chitwood, Sigrity
Sanjeev Gupta, Agilent
Shangli Wu, Cadence Design Systems
Sid Singh, Extreme Networks
Stephen Scearce, Cisco Systems
Steve Pytel, Ansoft
Syed Huq, Cisco Systems
Syed Sadeghi, ST Micro
* Terry Jernberg, Cadence Design Systems
Todd Westerhoff, SiSoft
Vikas Gupta, Xilinx
Vuk Borich, Agilent
* Walter Katz, SiSoft
Zhen Mu, Cadence Design Systems
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Opens:
- No meeting Tuesday, 1 week from today (Arpad)
- IBISCHK5 and AMI parsing (Michael Mirmak)
* The bid packet for IBISCHK5 is being prepared, and the committee
would like to know whether parsing of the AMI parameter (.ami) file
should be included. Earlier reports suggested that the code to do
this would be provided by SiSoft. If not, this would be included in
the bid, either as a separate item or as part of IBISCHK5.
* AR Walter to confirm whether SiSoft donation is still planned.
--------------------------
Call for patent disclosure:
- No one declared a patent.
-------------
Review of ARs:
- Arpad: Write parameter passing syntax proposal (BIRD draft)
for *-AMS models in IBIS that is consistent with the
parameter passing syntax of the AMI models
- TBD
- TBD: Propose a parameter passing syntax for the SPICE
- [External ...] also?
- TBD
- Arpad: Review the documentation (annotation) in the macro libraries.
- Deferred until a demand arises or we have nothing else to do
-------------
New Discussion:
Synopsys update:
- Michael M: Synopsys writes that "Synopsys approves and fully supports this
[IBIS/SPICE
standarization] effort. Please proceed with circulating the documents and
please include
[us in] the discussions so that we can help in any way we can."
* AR Michael M. - send proposal document to Mike LaBonte for posting; also
confirm with Synopsys whether "used by permission" can be used as
the official indicator on relevant documents.
Walter reviewed his document for Final_Stage_Subckt keyword
- the keyword separates single and diff stages
- it also uses the syntax and assumptions of [External Model] (ports, for
example)
- it supports on-die S-parameters and RC branch C_comp
- gnd or ideal node zero is assumed as a default
- typ, min and max values may be named explicitly; parameters are passed into
the called subcircuit
Several examples were shown. Walter noted that IBIS can then satisfy true diff
TX/RX with I-V and V-t
data using this approach and a final stage.
David Banas: the text mentions B-element, does this mean the keyword only
applies to SPICE imports?
Walter: no.
The actual subcircuit contents may be either written in IBIS Buffer SPICE or
IBIS Interconnect SPICE.
Arpad Muranyi: do we expect 3 separate subcircuit definitions, one for each
corner?
Walter: Your choice - one or three
John Angulo: how positioned vs. AMS? How do the ports work vs. AMS names?
Walter, Arpad: this may need to be resolved separately.
Radek: is there any conflict with .param definitions elsewhere in the calling
circuit?
Walter: this is defined by the subcircuit scope and passing
Arpad: disallowing node 0 usage is requested.
Walter: A_gnd is defined as node 0 in the current specification, so this would
be hard to avoid.
Also, this is only the default.
Michael Mirmak: non-ideal referencing allowed?
Walter: Yes.
Michael Mirmak: use of typ, min, max as "process corners" may be insufficient
and limiting.
Arpad: this format conflicts with C_comp numerical ordering.
Walter: some simlar struture is needed for corner identification. Issue will
be resolved later.
John Angulo: use of these keywords makes it easier to compensate B-element to
match V-t curves?
Walter: the text assumes that C_comp is to be ignored if the extra circuitry is
there.
John/Arpad: How to tell the tool what/how to compensate?
Bob: as in older tools, can we assume the new cirucit is a dead load?
Michael: doesn't this change the fundamental assumptions of IBIS V-t and
IBIS-from-measurement?
Walter observed that this approach assumes data is available from simulation.
One can't use
measurement data here, nor could encryption be used on the additional
circuitry. The V-t tables
should be set up carefully by the model maker so that compensation should not
be required.
Next meeting: 18 November 2008 12:00pm PT
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