On Sat, 25 Jul 2009 11:01:53 -0500, Alexander von Gluck > Attached is a patch that covers the following PPC items: > > * relocated those previous isync / sync patches to make them better > utilized. Since we ALWAYS have to isync or sync near mtsrin (and family) > calls, why leave it up to the function caller to do so? > > * added some assembly syncs/isyncs calls to other needed places defined by: > http://application-notes.digchip.com/314/314-67492.pdf > > * commented out a return to bootloader statement we were triggering during > kernel boot-up to help ease the troubleshooting of trac Ticket #4115 . Once > this problem is fixed there is no harm in leaving that return commented. > We will print relocation errors and continue as far as we can (that way we > can see the scope of the errors). No one loved the previous diff so I this is cumulative on the last one. Adding more Haiku PPC love. There are several missing PPC kernel relocations as per readelf and TRAC # 4115. Trying to work through them. Once all the relocation issues are fixed Haiku may boot further on PPC! Thanks! -- Alex
Index: src/system/kernel/arch/ppc/arch_cpu.cpp =================================================================== --- src/system/kernel/arch/ppc/arch_cpu.cpp (revision 31940) +++ src/system/kernel/arch/ppc/arch_cpu.cpp (working copy) @@ -48,6 +48,15 @@ } status_t +arch_cpu_init_percpu(kernel_args *args, int curr_cpu) +{ + //detect_cpu(curr_cpu); + + // we only support one on ppc anyway at the moment... + return 0; +} + +status_t arch_cpu_init_post_modules(kernel_args *args) { return B_OK; Index: src/system/kernel/arch/ppc/arch_cpu_asm.S =================================================================== --- src/system/kernel/arch/ppc/arch_cpu_asm.S (revision 31748) +++ src/system/kernel/arch/ppc/arch_cpu_asm.S (working copy) @@ -31,7 +31,9 @@ * r3 r4 */ FUNCTION(set_sr): + isync mtsrin %r4, %r3 + isync blr /* uint32 get_msr(void); @@ -45,6 +47,7 @@ */ FUNCTION(set_msr): mtmsr %r3 + isync blr /* uint32 get_pvr(void); Index: src/system/kernel/arch/ppc/arch_asm.S =================================================================== --- src/system/kernel/arch/ppc/arch_asm.S (revision 31748) +++ src/system/kernel/arch/ppc/arch_asm.S (working copy) @@ -26,6 +26,7 @@ // sets bit 15, EE mtmsr %r3 // put it back into the msr + isync blr @@ -40,6 +41,7 @@ // clears bit 15, EE mtmsr %r4 // put it back into the msr + isync blr @@ -53,6 +55,7 @@ // clear or set bit 15, EE to the same state as in r3, oldState mtmsr %r4 + isync blr /* bool arch_int_are_interrupts_enabled(void) */ @@ -175,7 +178,9 @@ // void sethid0(unsigned int val); FUNCTION(sethid0): + isync mtspr 1008, %r3 + isync blr // unsigned int getl2cr(); @@ -185,7 +190,9 @@ // void setl2cr(unsigned int val); FUNCTION(setl2cr): + isync mtspr 1017, %r3 + isync blr Index: src/system/boot/platform/openfirmware/arch/ppc/mmu.cpp =================================================================== --- src/system/boot/platform/openfirmware/arch/ppc/mmu.cpp (revision 31748) +++ src/system/boot/platform/openfirmware/arch/ppc/mmu.cpp (working copy) @@ -991,12 +991,8 @@ // set up new page table and turn on translation again for (int32 i = 0; i < 16; i++) { - isync(); - ppc_set_segment_register((void *)(i * 0x10000000), sSegments[i]); // one segment describes 256 MB of memory - - ppc_sync(); } ppc_set_page_table(physicalTable, tableSize); Index: src/system/kernel/arch/ppc/arch_elf.cpp =================================================================== --- src/system/kernel/arch/ppc/arch_elf.cpp (revision 31940) +++ src/system/kernel/arch/ppc/arch_elf.cpp (working copy) @@ -197,7 +197,9 @@ "addend 0x%lx\n", __FUNCTION__, i, ELF32_R_TYPE(rel[i].r_info), rel[i].r_offset, ELF32_R_SYM(rel[i].r_info), rel[i].r_addend); + #ifndef _BOOT_MODE // We only need to return if this is during runtime. return vlErr; + #endif } break; }