Hi Christian, I'm glad this is moving forward! :-D On 2009-06-14 at 16:16:50 [+0200], Christian Packmann <Christian.Packmann@xxxxxx> wrote: > I could need a few volunteers now to run the benchmark on various systems > and post/mail the results. This would help me in deciding which routines > should be aggressively optimized. > I'd be especially interested in the following systems (but other systems > would be welcome as well): > * Intel Core2 65nm (can be recognized by lack of SSE4.1 support) Benchmark: Haiku app_server bilinear copy Compile date: Jun 14 2009 14:38:02 GCC version: 2.95.3-haiku-081024 CPU vendor ID: GenuineIntel CPU: Intel(R) Core(TM)2 CPU 4300 @ 1.80GHz SIMD instructions: MMX SSE SSE-Integer SSE2 SSE3 SSSE3 Can't lock process to CPU on this platform. Estimated CPUID/RDTSC overhead: 252 clock cycles. 10 runs per benchmark. -- Results -- Minimum Average Maximum # 1: 359595 374192 501723 - 'C, original' # 2: 331641 332498 334395 - 'C, precise' # 3: 349902 350346 352089 - 'C, precise DIV' # 4: 187821 188208 190215 - 'MMX/SSE' # 5: 177642 177862 179010 - 'MMX/SSE optim-test' # 6: 249093 249924 255258 - 'SSE2' # 7: 230067 231856 246699 - 'SSSE3' Best regards, -Stephan