On Sun, Jun 14, 2009 at 7:16 AM, Christian Packmann<Christian.Packmann@xxxxxx> wrote: > I'd be especially interested in the following systems (but other systems > would be welcome as well): And here's the worst machine I have yet to run it on... A Via C3 Ezra 800mhz "Gigapro 1.1" running gcc2 Haiku r31053: ~> sysinfo Kernel name: kernel_x86 built on: Jun 14 2009 16:11:47 version 0x1 1 IDT C3 Ezra, revision 0678 running at 801MHz (ID: 0x00000000 0x00000000) CPU #0: "VIA Ezra" FPU DE TSC MSR MTRR PGE MMX Extended Intel: 0x00000000 Inst TLB: 128 entries, 8-way set associative Data TLB: 128 entries, 8-way set associative L1 inst cache: 64 KB, 4-way set associative, 1 lines/tag, 32 bytes/line L1 data cache: 64 KB, 4-way set associative, 1 lines/tag, 32 bytes/line L2 cache: 16388 KB, 1-way set associative, 1 lines/tag, 32 bytes/line 40202240 bytes free (used/max 77172736 / 117374976) (cached 29368320) 15171 semaphores free (used/max 1213 / 16384) 3971 ports free (used/max 125 / 4096) 3992 threads free (used/max 104 / 4096) 2031 teams free (used/max 17 / 2048) ~> runme_haiku Benchmark: Haiku app_server bilinear copy Compile date: Jun 14 2009 14:38:02 GCC version: 2.95.3-haiku-081024 CPU vendor ID: CentaurHauls CPU: VIA Ezra SIMD instructions: MMX VIA-specific: Can't lock process to CPU on this platform. Estimated CPUID/RDTSC overhead: 87 clock cycles. 10 runs per benchmark. -- Results -- Minimum Average Maximum # 1: 2665416 2751064 3290827 - 'C, original' # 2: 2296688 2339107 2620041 - 'C, precise' # 3: 2501594 2519535 2563743 - 'C, precise DIV' Skipped 'MMX/SSE', insufficient SIMD support Skipped 'MMX/SSE optim-test', insufficient SIMD support Skipped 'SSE2', insufficient SIMD support Skipped 'SSSE3', insufficient SIMD support Wow is that sad... horrible machine. - Urias