[haiku-development] Re: AMD Geode nano-size motherboard

On 16/04/2008, Axel Dörfler <axeld@xxxxxxxxxxxxxxxx> wrote:
> "Alex Roman" <alex.roman@xxxxxxxxx> wrote:
>  > I have this older headless PC which actually has a 256MB NOR flash
>  > chip (with no controller) where it stores Win CE and uses a
>  > proprietary filesystem which apparently does this shuffling.
>
>
> I guess this would be best done on the block level (simulating what
>  that controller does), and not on the file system level. Then you could
>  even use every FS out there. Sounds like one of those GSoC ideas for
>  next year, maybe ;-)
>
>  Bye,
>
>    Axel.
>
>
>

I wrote a flash file system for an embedded device a year or so ago.
At the simplest level the wear leveling simply needs to keep track of
the number of erase / write cycles each sector (block what ever) of
the disk.  This can be table based, or block / sector / page
orientated  The complexity comes from managing and randomly shuffling
this data around.  The simple trick with NAND is often to use a
specific block as the master index to the data tables, re-writing the
block, but not erasing until all bits are 0, it's just an array where
un-used slots are FF's and used slots 0's.  Each time the table moves
you simply write all the bits to zero the entry, then move to the next
array position when the FS tables move.  Still there is a difference
between a simple 4MB FFS and 4GB+. :)  You also need to track CRCs
(sometimes allowing multiple CRCs) for sectors too as eventually bit
errors will creep in.  Most low-level flash have extra space per page
for CRC, and table indexing, and marking the block as bad / unusable.


My 2c of useless information...

Other related posts: