[haiku-commits] haiku: hrev44194 - src/system/boot/platform/raspberrypi_arm headers/private/kernel/arch/arm src/system/boot/platform/u-boot

hrev44194 adds 3 changesets to branch 'master'
old head: 87a01ad64e9fcbc0ad0a839e56ef8a857450a72f
new head: 4fd190af6ef55971ac745f7a5644da240ee70d79

----------------------------------------------------------------------------

9c5e60f: rPi MMU: Fixes to hrev44189
  
  * I had the wrong addresses, 0x20 was the physical
    address not a mapped one.
  * Attempt to map uart in mmu post mmu_init.

f0ba7f9: MMU: Clean up arm L1 MMU types
  
  * Include map for each page table type
  * Reduce MMU_TYPE define name length

4fd190a: MMU: Add in section L1 MMU size
  
  * Not used atm, but exists.

                          [ Alexander von Gluck IV <kallisti5@xxxxxxxxxxx> ]

----------------------------------------------------------------------------

6 files changed, 85 insertions(+), 53 deletions(-)
headers/private/kernel/arch/arm/arm_mmu.h          |   44 ++++++++++-----
headers/private/kernel/arch/arm/bcm2708.h          |   11 ++--
src/system/boot/platform/raspberrypi_arm/mmu.cpp   |   47 +++++++++-------
.../boot/platform/raspberrypi_arm/serial.cpp       |    6 +-
src/system/boot/platform/raspberrypi_arm/start.c   |    2 +-
src/system/boot/platform/u-boot/mmu.cpp            |   28 +++++----

############################################################################

Commit:      9c5e60f6560e909effa2a5d31b3a630c23198aac
URL:         http://cgit.haiku-os.org/haiku/commit/?id=9c5e60f
Author:      Alexander von Gluck IV <kallisti5@xxxxxxxxxxx>
Date:        Tue May 22 12:03:56 2012 UTC

rPi MMU: Fixes to hrev44189

* I had the wrong addresses, 0x20 was the physical
  address not a mapped one.
* Attempt to map uart in mmu post mmu_init.

----------------------------------------------------------------------------

diff --git a/headers/private/kernel/arch/arm/bcm2708.h 
b/headers/private/kernel/arch/arm/bcm2708.h
index 010851c..7408372 100644
--- a/headers/private/kernel/arch/arm/bcm2708.h
+++ b/headers/private/kernel/arch/arm/bcm2708.h
@@ -36,10 +36,9 @@
  *  - BCM2835-ARM-Peripherals.pdf
  */
 
-// 1.2.2 notes that peripherals are remapped from 0x7e to 0x20
+// Section 1.2.2
 #define BCM2708_SDRAM_BASE             0x00000000
-#define BCM2708_DEVICEHW_BASE  0x7E000000 // Real Hardware Base
-#define BCM2708_DEVICEFW_BASE  0x20000000 // Firmware Mapped Base
+#define BCM2708_PERIPHERAL_BASE        0x20000000
 
 #define ST_BASE                        0x3000
        // System Timer, sec 12.0, page 172
@@ -77,11 +76,11 @@
 #define ARM_CTRL_0_SBM_BASE            (ARM_BASE + 0x800)
        // ARM Semaphores, Doorbells, and Mailboxes
 
-#define VECT_BASE 0xffff0000
+#define VECT_BASE 0xFFFF0000
 #define VECT_SIZE SIZE_4K
 
-#define DEVICE_BASE            BCM2708_DEVICEHW_BASE
-#define DEVICE_SIZE            0x1000000
+#define PERIPHERAL_BASE        BCM2708_PERIPHERAL_BASE
+#define PERIPHERAL_SIZE 0xFFFFFF
 
 #define SDRAM_BASE             BCM2708_SDRAM_BASE
 #define SDRAM_SIZE             0x4000000
diff --git a/src/system/boot/platform/raspberrypi_arm/mmu.cpp 
b/src/system/boot/platform/raspberrypi_arm/mmu.cpp
index e628255..f5f0368 100644
--- a/src/system/boot/platform/raspberrypi_arm/mmu.cpp
+++ b/src/system/boot/platform/raspberrypi_arm/mmu.cpp
@@ -62,12 +62,16 @@ struct memblock {
 static struct memblock LOADER_MEMORYMAP[] = {
        {
                "devices",
-               DEVICE_BASE,
-               DEVICE_BASE + DEVICE_SIZE - 1,
+               PERIPHERAL_BASE,
+               PERIPHERAL_BASE + PERIPHERAL_SIZE,
                MMU_L2_FLAG_B,
        },
+       // Device memory between 0x0 and 0x10000000
+       // (0x0) Ram / Video ram (0x10000000) (256MB)
+       // We don't detect the split yet, se we have to be
+       // careful not to run into video ram.
        {
-               "RAM_loader", // 1MB loader
+               "RAM_loader", // 1MB for the loader
                SDRAM_BASE + 0,
                SDRAM_BASE + 0x0fffff,
                MMU_L2_FLAG_C,
@@ -84,7 +88,6 @@ static struct memblock LOADER_MEMORYMAP[] = {
                SDRAM_BASE + 0x11FFFFF,
                MMU_L2_FLAG_C,
        },
-#if 0
        {
                "RAM_stack", // stack
                SDRAM_BASE + 0x1200000,
@@ -97,7 +100,7 @@ static struct memblock LOADER_MEMORYMAP[] = {
                SDRAM_BASE + 0x2500000,
                MMU_L2_FLAG_C,
        },
-
+       // (0x2500000 ~37MB)
 #ifdef FB_BASE
        {
                "framebuffer", // 2MB framebuffer ram
@@ -106,7 +109,6 @@ static struct memblock LOADER_MEMORYMAP[] = {
                MMU_L2_FLAG_AP_RW|MMU_L2_FLAG_C,
        },
 #endif
-#endif
 };
 
 
@@ -585,7 +587,7 @@ mmu_init(void)
 {
        CALLED();
 
-       mmu_write_C1(mmu_read_C1() & ~((1<<29)|(1<<28)|(1<<0)));
+       mmu_write_C1(mmu_read_C1() & ~((1 << 29) | (1 << 28) | (1 << 0)));
                // access flag disabled, TEX remap disabled, mmu disabled
 
        uint32 highestRAMAddress = SDRAM_BASE;
diff --git a/src/system/boot/platform/raspberrypi_arm/serial.cpp 
b/src/system/boot/platform/raspberrypi_arm/serial.cpp
index 3d58f87..b97d0b7 100644
--- a/src/system/boot/platform/raspberrypi_arm/serial.cpp
+++ b/src/system/boot/platform/raspberrypi_arm/serial.cpp
@@ -14,6 +14,7 @@
 #include <boot/platform.h>
 #include <arch/cpu.h>
 #include <boot/stage2.h>
+#include "mmu.h"
 
 #include <string.h>
 
@@ -87,7 +88,10 @@ serial_cleanup(void)
 extern "C" void
 serial_init(void)
 {
-       gUART = arch_get_uart_pl011(BOARD_UART_DEBUG, BOARD_UART_CLOCK);
+       addr_t uart0 = mmu_map_physical_memory(PERIPHERAL_BASE + 
BOARD_UART_DEBUG,
+               0x00004000, kDefaultPageFlags);
+
+       gUART = arch_get_uart_pl011(uart0, BOARD_UART_CLOCK);
        gUART->InitEarly();
        gUART->InitPort(9600);
 
diff --git a/src/system/boot/platform/raspberrypi_arm/start.c 
b/src/system/boot/platform/raspberrypi_arm/start.c
index c7ee41e..6b3de48 100644
--- a/src/system/boot/platform/raspberrypi_arm/start.c
+++ b/src/system/boot/platform/raspberrypi_arm/start.c
@@ -112,7 +112,7 @@ pi_start(void)
        gpio_init();
 
        // Flick on "OK" led, use pre-mmu firmware base
-       gpio_write(BCM2708_DEVICEFW_BASE + GPIO_BASE, 16, 0);
+       gpio_write(PERIPHERAL_BASE + GPIO_BASE, 16, 0);
 
        mmu_init();
 

############################################################################

Commit:      f0ba7f94003c0f341ccd2590a2d12b1c782b5216
URL:         http://cgit.haiku-os.org/haiku/commit/?id=f0ba7f9
Author:      Alexander von Gluck IV <kallisti5@xxxxxxxxxxx>
Date:        Tue May 22 13:29:03 2012 UTC

MMU: Clean up arm L1 MMU types

* Include map for each page table type
* Reduce MMU_TYPE define name length

----------------------------------------------------------------------------

diff --git a/headers/private/kernel/arch/arm/arm_mmu.h 
b/headers/private/kernel/arch/arm/arm_mmu.h
index ace5c87..b125ef0 100644
--- a/headers/private/kernel/arch/arm/arm_mmu.h
+++ b/headers/private/kernel/arch/arm/arm_mmu.h
@@ -1,32 +1,48 @@
+/*
+ * Copyright 2010-2012 Haiku, Inc. All rights reserved.
+ * Distributed under the terms of the MIT License.
+ *
+ * Authors:
+ *             Francois Revol
+ *             Ithamar R. Adema, ithamar.adema@xxxxxxxxxxxxxxxx
+ *             Alexander von Gluck, kallisti5@xxxxxxxxxxx
+ */
 #ifndef _ARCH_ARM_ARM_MMU_H
 #define _ARCH_ARM_ARM_MMU_H
 
+
 /*
  * generic arm mmu definitions
  */
 
-
 /*
- * defines for the page directory (aka Master/Section Table)
+ * L1 defines for the page directory (page table walk methods)
  */
+#define MMU_L1_TYPE_FAULT              0x0
+       // MMU Fault
+       // 31                                                  2 10
+       // |                                                    |00|
+#define MMU_L1_TYPE_SECTION            0x2
+       // Single step table walk, 4096 entries
+       // 1024K pages, 16K consumed
+       // 31                   20 19   12 11  10 9 8      5 432 10
+       // | page table address   |  0?   |  AP  |0| domain |1CB|10|
+#define MMU_L1_TYPE_FINE               0x3
+       // Three(?) step table walk, 1024 entries
+       // 1K, 4K, 64K pages, 4K consumed
+       // 31                           12 11     9 8      5 432 10
+       // | page table address           |   0?   | domain |100|11|
+#define MMU_L1_TYPE_COARSE             0x1
+       // Two step table walk, 256 entries
+       // 4K(Haiku), 64K pages, 1K consumed
+       // 31                                  10 9 8      5 432 10
+       // | page table address                  |0| domain |000|01|
 
-#define MMU_L1_TYPE_COARSEPAGETABLE 0x1
-       //only type used in Haiku by now (4k pages)
 
-// coarse pagetable entry :
-//
-// 31                    10 9 8      5 432 10
-// | page table address    |?| domain |000|01
-//
 // the domain is not used so and the ? is implementation specified... have not
 // found it in the cortex A8 reference... so I set t to 0
 // page table must obviously be on multiple of 1KB
 
-#define MMU_L1_TYPE_SECTION 0x2
-       //map 1MB directly instead of using a page table (not used)
-#define MMU_L1_TYPE_FINEEPAGETABLE 0x3
-       //map 1kb pages (not used and not supported on newer ARMs)
-
 /*
  * L2-Page descriptors... now things get really complicated...
  * there are three different types of pages large pages (64KB) and small(4KB)
diff --git a/src/system/boot/platform/raspberrypi_arm/mmu.cpp 
b/src/system/boot/platform/raspberrypi_arm/mmu.cpp
index f5f0368..1ecc574 100644
--- a/src/system/boot/platform/raspberrypi_arm/mmu.cpp
+++ b/src/system/boot/platform/raspberrypi_arm/mmu.cpp
@@ -246,10 +246,10 @@ get_next_page_table(uint32 type)
 
        size_t size = 0;
        switch(type) {
-               case MMU_L1_TYPE_COARSEPAGETABLE:
+               case MMU_L1_TYPE_COARSE:
                        size = 1024;
                break;
-               case MMU_L1_TYPE_FINEEPAGETABLE:
+               case MMU_L1_TYPE_FINE:
                        size = 4096;
                break;
        }
@@ -281,12 +281,12 @@ init_page_directory()
 
        // clear out the pgdir
        for (uint32 i = 0; i < 4096; i++)
-       sPageDirectory[i] = 0;
+               sPageDirectory[i] = 0;
 
        uint32 *pageTable = NULL;
        for (uint32 i = 0; i < ARRAY_SIZE(LOADER_MEMORYMAP);i++) {
 
-               pageTable = get_next_page_table(MMU_L1_TYPE_COARSEPAGETABLE);
+               pageTable = get_next_page_table(MMU_L1_TYPE_COARSE);
                TRACE("BLOCK: %s START: %lx END %lx\n", 
LOADER_MEMORYMAP[i].name,
                        LOADER_MEMORYMAP[i].start, LOADER_MEMORYMAP[i].end);
                addr_t pos = LOADER_MEMORYMAP[i].start;
@@ -299,8 +299,8 @@ init_page_directory()
                        if (c > 255) { // we filled a pagetable => we need a 
new one
                                // there is 1MB per pagetable so:
                                sPageDirectory[VADDR_TO_PDENT(pos)]
-                                       = (uint32)pageTable | 
MMU_L1_TYPE_COARSEPAGETABLE;
-                               pageTable = 
get_next_page_table(MMU_L1_TYPE_COARSEPAGETABLE);
+                                       = (uint32)pageTable | 
MMU_L1_TYPE_COARSE;
+                               pageTable = 
get_next_page_table(MMU_L1_TYPE_COARSE);
                                c = 0;
                        }
 
@@ -309,7 +309,7 @@ init_page_directory()
 
                if (c > 0) {
                        sPageDirectory[VADDR_TO_PDENT(pos)]
-                               = (uint32)pageTable | 
MMU_L1_TYPE_COARSEPAGETABLE;
+                               = (uint32)pageTable | MMU_L1_TYPE_COARSE;
                }
        }
        TRACE("%s: Page table setup complete\n", __func__);
@@ -340,7 +340,7 @@ add_page_table(addr_t base)
        TRACE("%s: base = %p\n", __func__, (void *)base);
 
        // Get new page table and clear it out
-       uint32 *pageTable = get_next_page_table(MMU_L1_TYPE_COARSEPAGETABLE);
+       uint32 *pageTable = get_next_page_table(MMU_L1_TYPE_COARSE);
 /*
        if (pageTable > (uint32 *)(8 * 1024 * 1024)) {
                panic("tried to add page table beyond the indentity mapped 8 MB 
"
@@ -352,7 +352,7 @@ add_page_table(addr_t base)
 
        // put the new page table into the page directory
        sPageDirectory[VADDR_TO_PDENT(base)]
-               = (uint32)pageTable | MMU_L1_TYPE_COARSEPAGETABLE;
+               = (uint32)pageTable | MMU_L1_TYPE_COARSE;
 }
 
 
diff --git a/src/system/boot/platform/u-boot/mmu.cpp 
b/src/system/boot/platform/u-boot/mmu.cpp
index 778c05d..0057213 100644
--- a/src/system/boot/platform/u-boot/mmu.cpp
+++ b/src/system/boot/platform/u-boot/mmu.cpp
@@ -256,10 +256,10 @@ get_next_page_table(uint32 type)
                "%p, type  0x%lx\n", sNextPageTableAddress, 
kPageTableRegionEnd, type));
        size_t size = 0;
        switch(type) {
-               case MMU_L1_TYPE_COARSEPAGETABLE:
+               case MMU_L1_TYPE_COARSE:
                        size = 1024;
                break;
-               case MMU_L1_TYPE_FINEEPAGETABLE:
+               case MMU_L1_TYPE_FINE:
                        size = 4096;
                break;
        }
@@ -296,7 +296,7 @@ init_page_directory()
        uint32 *pageTable = NULL;
        for (uint32 i = 0; i < ARRAY_SIZE(LOADER_MEMORYMAP);i++) {
 
-               pageTable = get_next_page_table(MMU_L1_TYPE_COARSEPAGETABLE);
+               pageTable = get_next_page_table(MMU_L1_TYPE_COARSE);
                TRACE(("BLOCK: %s START: %lx END %lx\n", 
LOADER_MEMORYMAP[i].name,
                        LOADER_MEMORYMAP[i].start, LOADER_MEMORYMAP[i].end));
                addr_t pos = LOADER_MEMORYMAP[i].start;
@@ -309,8 +309,8 @@ init_page_directory()
                        if (c > 255) { // we filled a pagetable => we need a 
new one
                                // there is 1MB per pagetable so:
                                sPageDirectory[VADDR_TO_PDENT(pos)]
-                                       = (uint32)pageTable | 
MMU_L1_TYPE_COARSEPAGETABLE;
-                               pageTable = 
get_next_page_table(MMU_L1_TYPE_COARSEPAGETABLE);
+                                       = (uint32)pageTable | 
MMU_L1_TYPE_COARSE;
+                               pageTable = 
get_next_page_table(MMU_L1_TYPE_COARSE);
                                c = 0;
                        }
 
@@ -319,7 +319,7 @@ init_page_directory()
 
                if (c > 0) {
                        sPageDirectory[VADDR_TO_PDENT(pos)]
-                               = (uint32)pageTable | 
MMU_L1_TYPE_COARSEPAGETABLE;
+                               = (uint32)pageTable | MMU_L1_TYPE_COARSE;
                }
        }
 
@@ -345,7 +345,7 @@ add_page_table(addr_t base)
        TRACE(("add_page_table(base = %p)\n", (void *)base));
 
        // Get new page table and clear it out
-       uint32 *pageTable = get_next_page_table(MMU_L1_TYPE_COARSEPAGETABLE);
+       uint32 *pageTable = get_next_page_table(MMU_L1_TYPE_COARSE);
 /*
        if (pageTable > (uint32 *)(8 * 1024 * 1024)) {
                panic("tried to add page table beyond the indentity mapped 8 MB 
"
@@ -357,7 +357,7 @@ add_page_table(addr_t base)
 
        // put the new page table into the page directory
        sPageDirectory[VADDR_TO_PDENT(base)]
-               = (uint32)pageTable | MMU_L1_TYPE_COARSEPAGETABLE;
+               = (uint32)pageTable | MMU_L1_TYPE_COARSE;
 }
 
 

############################################################################

Revision:    hrev44194
Commit:      4fd190af6ef55971ac745f7a5644da240ee70d79
URL:         http://cgit.haiku-os.org/haiku/commit/?id=4fd190a
Author:      Alexander von Gluck IV <kallisti5@xxxxxxxxxxx>
Date:        Tue May 22 14:07:29 2012 UTC

MMU: Add in section L1 MMU size

* Not used atm, but exists.

----------------------------------------------------------------------------

diff --git a/src/system/boot/platform/raspberrypi_arm/mmu.cpp 
b/src/system/boot/platform/raspberrypi_arm/mmu.cpp
index 1ecc574..f01bacc 100644
--- a/src/system/boot/platform/raspberrypi_arm/mmu.cpp
+++ b/src/system/boot/platform/raspberrypi_arm/mmu.cpp
@@ -241,17 +241,22 @@ mmu_write_DACR(uint32 value)
 static uint32 *
 get_next_page_table(uint32 type)
 {
-       TRACE("%s: sNextPageTableAddress %p, kPageTableRegionEnd %p, type  
0x%lx\n",
-               __func__, sNextPageTableAddress, kPageTableRegionEnd, type);
+       TRACE("%s: sNextPageTableAddress %p, kPageTableRegionEnd %p, "
+               "type 0x" B_PRIX32 "\n", __func__, sNextPageTableAddress,
+               kPageTableRegionEnd, type);
 
        size_t size = 0;
        switch(type) {
                case MMU_L1_TYPE_COARSE:
+               default:
                        size = 1024;
-               break;
+                       break;
                case MMU_L1_TYPE_FINE:
                        size = 4096;
-               break;
+                       break;
+               case MMU_L1_TYPE_SECTION:
+                       size = 16384;
+                       break;
        }
 
        addr_t address = sNextPageTableAddress;
diff --git a/src/system/boot/platform/u-boot/mmu.cpp 
b/src/system/boot/platform/u-boot/mmu.cpp
index 0057213..60891dc 100644
--- a/src/system/boot/platform/u-boot/mmu.cpp
+++ b/src/system/boot/platform/u-boot/mmu.cpp
@@ -253,15 +253,21 @@ static uint32 *
 get_next_page_table(uint32 type)
 {
        TRACE(("get_next_page_table, sNextPageTableAddress %p, 
kPageTableRegionEnd "
-               "%p, type  0x%lx\n", sNextPageTableAddress, 
kPageTableRegionEnd, type));
+               "%p, type 0x" B_PRIX32 "\n", sNextPageTableAddress,
+               kPageTableRegionEnd, type));
+
        size_t size = 0;
        switch(type) {
                case MMU_L1_TYPE_COARSE:
+               default:
                        size = 1024;
-               break;
+                       break;
                case MMU_L1_TYPE_FINE:
                        size = 4096;
-               break;
+                       break;
+               case MMU_L1_TYPE_SECTION:
+                       size = 16384;
+                       break;
        }
 
        addr_t address = sNextPageTableAddress;


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  • » [haiku-commits] haiku: hrev44194 - src/system/boot/platform/raspberrypi_arm headers/private/kernel/arch/arm src/system/boot/platform/u-boot - kallisti5